CIRCUIT CHIP MOUNTED CARD AND CIRCUIT CHIP MODULE

• US 20020070280A1
• Filed: 06/22/1999
• Published: 06/13/2002
• Est. Priority Date: 12/27/1996
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: IKEFUJI, YOSHIHIRO, CHIMURA, SHIGEMI, OKADA, HIROHARU
• Granted Patent: US 6,422,473 B1
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/072 the record carrier comprising a plurality of integrated circuit chips
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/0726 the arrangement including a circuit for tuning the resonance frequency of an antenna on the record carrier
• CPC Class Codes: G06K 19/07745 Mounting details of integrated circuit chips
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Oppositely arranged bumps (82,84) are electrically connected by connecting two IC chips (76,78) through an anisotropic conductor (80) to form an IC chip module (74). With IC chip module (74) having such structure, two IC chips (76,78) provided with functions of a processing portion and an antenna are simply stacked to provide a function for communication, and arrangement of interconnection outside IC chip (76,78) is not necessary. Thus, accidental breakage of the interconnection is avoided and assembly is extremely facilitated. Therefore, a circuit chip mounted card with higher reliability and reduced manufacturing cost and the like can be provided.

Claims

1. A circuit chip mounted card provided with an antenna for communication utilizing an electromagnetic wave and a processing portion performing a process for communication, comprising:

a first circuit chip including at least a portion of the processing portion and having a terminal; and

a second circuit chip including the antenna and a remaining portion of the processing portion and having a terminal, and characterized in that said terminals are electrically connected by stacking said first circuit chip and said second circuit chip in a direction of thickness of the card.

2. The circuit chip mounted card according to claim 1, characterized in that a terminal is provided for said first circuit chip on a side of said second circuit chip and a terminal is provided for said second circuit chip on a side of said first circuit chip oppositely to said terminal provided for said first circuit chip, and said first circuit chip and said second circuit chip are directly stacked and connected.

3. The circuit chip mounted card according to claim 1, characterized in that a terminal is provided for said first circuit chip on a side of said second circuit chip and a terminal is provided for said second circuit chip on a side of said first circuit chip oppositely to said terminal for said first circuit chip, and said first circuit chip and said second circuit chip are stacked and connected through an anisotropic conductor.

4. The circuit chip mounted card according to claim 1, characterized in that said second circuit chip is provided with a capacitor and a coil forming said antenna.

5. The circuit chip mounted card according to claim 4, characterized in that a resonance circuit is formed by at least one capacitor and coil of circuit elements forming said second circuit chip.

6. The circuit chip mounted card according to claim 4, characterized in that said coil is formed of a metal interconnection layer in a loop like shape.

7. The circuit chip mounted card according to any of claims 4 to 6, characterized in that at least one of said capacitors is formed of a ferroelectric substance.

8. The circuit chip mounted card according to any of claims 1 to 3, characterized in that said first circuit chip is provided with a non-volatile memory and a modulating/demodulating circuit forming the processing portion.

10. The circuit chip mounted card according to any of claims 1 to 9, characterized in that a reinforcing member including a frame arranged to surround said first circuit chip and said second circuit chip in a direction of a face orthogonal to the direction of thickness of the card is provided in the card.

9. A circuit chip mounted card provided with an antenna for communication utilizing an electromagnetic wave and a processing portion performing a process for communication, comprising:

a first base material;

a second base material arranged with a prescribed distance from the first base material in a direction of thickness of the card;

a core member layer arranged between the first base and the second base; and

a circuit chip module arranged in said core member layer, and characterized in that said circuit chip module is a composition of a first circuit chip including at least a portion of the processing portion and having a terminal and a second circuit chip including an antenna and a remaining portion of the processing portion and having a terminal provided oppositely to said terminal stacked in the direction of thickness of the card through an anisotropic conductor to electrically connect said terminals

11. A circuit chip module forming a card with a circuit including an antenna for communication utilizing an electromagnetic wave and a processing portion performing a process for communication, comprising:

a first circuit chip including at least a portion of the processing portion and having a terminal; and

a second circuit chip including the antenna and a remaining portion of the processing portion and having a terminal, and characterized in that said first circuit chip and said second circuit chip are stacked in a direction of thickness of the card to electrically connect said terminals.

12. Circuit chip module according to claim 11, characterized in that the electrical connection of said terminals is obtained by an anisotropic conductor interposed between said first circuit chip and said second circuit chip.

13. The circuit chip module according to claim 11, characterized in that a resonance frequency of a resonance circuit including a capacitor and a coil of the antenna provided in said first and second circuit chips can be adjusted.

14. The circuit chip module according to claim 11, characterized in that a desired resonance frequency is obtained by selectively disconnecting an interconnection for a plurality of capacitors preliminary provided in said first and second circuit chips.

15. The circuit chip module according to claim 13, characterized in that a desired resonance frequency is obtained by selectively disconnecting an interconnection for a plurality of coils preliminary provided in said first and second circuit chips.

16. A composition of circuit chips including a first circuit chip and a second circuit chip in a stack, characterized in that a terminal is provided for said first circuit chip on a side of said second circuit chip, a terminal is provided for said second circuit chip on a side of said first circuit chip, and said first circuit chip and said second circuit chip are stacked to electrically connect said terminal provided for said first circuit chip and said terminal provided for said second circuit chip, and

at least one of said first circuit chip and said second circuit chip is provided with a detour interconnection for electrically connecting two terminals of said one circuit chip, so that two terminals of the other circuit chip respectively connected to said two terminals are electrically connected.

17. A circuit chip mounted card provided with a circuit chip module including a composition of a first circuit chip and a second circuit chip in a stack, wherein said circuit chip module is characterized in that

a terminal is provided for said first circuit chip on a side of said second circuit chip, a terminal is provided for said second circuit chip on a side of said first circuit chip, and said first circuit chip and said second circuit chip are stacked to electrically connect said terminal provided for said first circuit chip and said terminal provided for said second circuit chip, and

at least one of said first circuit chip and said second circuit chip is provided with a detour interconnection for electrically connecting two terminals of said one circuit chip, so that two terminals of the other circuit chip respectively connected to said two terminals are electrically connected by said detour interconnection.