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Method for fabricating thin film transistor array substrate for liquid crystal display

  • US 20020074549A1
  • Filed: 02/15/2002
  • Published: 06/20/2002
  • Est. Priority Date: 06/03/1999
  • Status: Active Grant
First Claim
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1. A method for fabricating a thin film transistor array substrate for a liquid crystal display, comprising the steps of:

  • forming a gate line assembly on a substrate by using a first mask, the gate line assembly including gate lines, gate electrodes, and gate pads;

    depositing a gate insulating layer, a semiconductor layer, a contact layer, and a first metal data line layer and a second metal data line layer onto the substrate with the gate line assembly in a sequential manner;

    forming a data line assembly with a predetermined pattern through etching the first metal data line layer and the second metal data line layer by using a second mask, the data line assembly including data lines, and source electrodes and drain electrodes;

    etching the contact layer through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly;

    depositing a passivation layer onto the structured substrate such that the passivation layer covers the semiconductor layer and the data line assembly;

    coating a photoresist film onto the passivation layer;

    exposing the photoresist film to light by using a third mask, and developing the exposed photoresist film to form a photoresist pattern of partially different thickness;

    forming a semiconductor pattern and contact windows, the semiconductor pattern being formed by etching the passivation layer and the underlying semiconductor layer at a pixel area defined by the neighboring gate line and data line through the photoresist pattern, a first contact window and a second contact window being formed by etching the passivation layer and the underlying second layers of the drain electrode and the data pad, a third contact window being formed by etching the passivation layer and the underlying semiconductor layer and gate insulating layer, and some upper portion of the gate pad;

    removing the photoresist pattern; and

    forming a pixel electrode by using a fourth mask such that the pixel electrode is connected to the drain electrode through the first contact window.

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