Memory cell sensing circuit
First Claim
1. A memory cell sensing circuit comprising:
- a main cell and a reference cell;
a first loading unit for providing a preset voltage to a sensing node of the main cell;
a second loading unit for supplying a prescribed voltage to a sensing node of the reference cell;
a first switching unit for adjusting the potential of the sensing node of the main cell;
a second switching unit for controlling the potential of the sensing node of the reference cell;
a main cell bit line voltage controlling unit for adjusting the potential of a bit line of the main cell;
a reference cell bit line voltage controlling unit for adjusting the potential of a bit line of the reference cell; and
a sense amplifier for sensing a state of the main cell by comparing the potential of the sensing node of the main cell and that of the sensing node of the reference cell.
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Accused Products
Abstract
There is provided a circuit for sensing a memory cell. The circuit includes a main cell, a reference cell, a first loading unit for providing a preset voltage to a sensing node of the main cell, a second loading unit for supplying a prescribed voltage to a sensing node of the reference cell, a first switching unit for adjusting the potential of the main cell sensing node, a second switching unit for controlling the potential of the reference cell sensing node, a first voltage controlling unit for adjusting the potential of a bit line of the main cell, a second voltage controlling unit for adjusting the potential of a bit line of the reference cell, and a sense amplifier for sensing a state of the main cell by comparing the potential of the main cell sensing node and that of the reference cell sensing node.
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Citations
15 Claims
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1. A memory cell sensing circuit comprising:
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a main cell and a reference cell;
a first loading unit for providing a preset voltage to a sensing node of the main cell;
a second loading unit for supplying a prescribed voltage to a sensing node of the reference cell;
a first switching unit for adjusting the potential of the sensing node of the main cell;
a second switching unit for controlling the potential of the sensing node of the reference cell;
a main cell bit line voltage controlling unit for adjusting the potential of a bit line of the main cell;
a reference cell bit line voltage controlling unit for adjusting the potential of a bit line of the reference cell; and
a sense amplifier for sensing a state of the main cell by comparing the potential of the sensing node of the main cell and that of the sensing node of the reference cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification