System and method for maintaining timing of synchronization messages over a reverse link of a CDMA wireless communication system

• US 20020080742A1
• Filed: 11/29/2001
• Published: 06/27/2002
• Est. Priority Date: 12/17/1997
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Tantivy Communications Incorporated (InterDigital, Inc.)
• Inventors: Proctor, James A. Jr.
• Granted Patent: US 7,936,728 B2
• Time in Patent Office: Days
• US Class Current: 370/335
• CPC Class Codes: H04B 7/2668 Arrangements for Wireless Code-Division Multiple Access [CDMA] System Synchronisation, for code acquisition H04B1/7075, for code tracking H04B1/7085
• CPC Class Codes: H04J 13/18 Allocation of orthogonal codes
• CPC Class Codes: H04L 1/0007 by modifying the frame length
• CPC Class Codes: H04L 1/165 Variable formats
• CPC Class Codes: H04L 1/1809 Selective-repeat protocols
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04Q 11/0428 Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
• CPC Class Codes: H04Q 2213/13098 Mobile subscriber
• CPC Class Codes: H04Q 2213/13202 Network termination [NT]
• CPC Class Codes: H04Q 2213/13204 Protocols
• CPC Class Codes: H04Q 2213/13209 ISDN
• CPC Class Codes: H04Q 2213/13216 Code signals, frame structure
• CPC Class Codes: H04Q 2213/1327 Release and resetting of connection
• CPC Class Codes: H04Q 2213/13298 Local loop systems, access network
• CPC Class Codes: H04Q 2213/13332 Broadband, CATV, dynamic bandwidth allocation
• CPC Class Codes: H04Q 2213/1336 Synchronisation
• CPC Class Codes: H04Q 2213/13389 LAN, internet
• CPC Class Codes: H04W 56/00 Synchronisation arrangements
• CPC Class Codes: H04W 84/14 WLL [Wireless Local Loop]; RLL [Radio Local Loop]

Abstract

A service option overlay for a CDMA wireless communication in which multiple allocatable subchannels are defined on a reverse link by assigning different code phases of a given long pseudonoise (PN) code to each subchannel. The instantaneous bandwidth needs of each on-line subscriber unit are then met by dynamically allocating none, one, or multiple subchannels on an as needed basis for each network layer connection. The system efficiently provides a relatively large number of virtual physical connections between the subscriber units and the base stations on the reverse link for extended idle periods such as when computers connected to the subscriber units are powered on, but not presently actively sending or receiving data. These maintenance subchannels permit the base station and the subscriber units to remain in phase, time and power synchronism while maintaining optimal timing control over synchronization messages. This in turn allows fast acquisition of additional reverse link capacity as needed by allocating additional orthogonal codes within the same code phase and by varying the spreading factor of the codes, as well as by adding additional code phases.

Claims

1. A method of controlling timing of synchronization messages between a subscriber access unit and a base station processor in a wireless CDMA system comprising:

providing at least one link between the subscriber access unit and the base station processor, the link establishing a synchronization between the subscriber access unit and the base station processor;

transmitting a synchronization maintenance message from the subscriber access unit to the base station processor; and

computing a timing interval in which to send an additional synchronization maintenance message;

the synchronization maintenance messages sufficient to maintain an idling mode connection between the subscriber access unit and the base station processor.

2. The method of claim 1 wherein computing the timing interval further comprises determining a duration required to maintain each of the wireless links.

3. The method of claim 1 wherein the timing interval is a timeslot.

4. The method of claim 3 further comprising a plurality of subscriber access units wherein each of the subscriber access units corresponds to one of a plurality of timeslots.

5. The method of claim 1 wherein the links further comprise active and inactive links and the synchronization maintenance message is transmitted on the inactive links.

6. The method of claim 1 wherein the idling mode connection maintains the synchronization between the subscriber access unit and the base station processor.

7. The method of claim 6 wherein the synchronization further comprises maintaining a code phase lock.

8. The method of claim 7 wherein computing the timing interval further comprises determining a minimal duration for maintaining the idling mode connection.

9. The method of claim 8 wherein the minimal duration is determined using a locking range of the code phase lock circuits at the base station.

10. The method of claim 8 wherein the minimum duration is determined by a channel timing variation.

11. The method of claim 8 wherein the minimum duration is determined by the maximum timing error required to maintain reverse link orthogonality among user channels.

12. The method of claim 1 wherein transmitting the synchronization maintenance message further comprises a timing marker indicative of a reference point for generating timing correction information.

13. The method of claim 12 wherein the timing marker is a pilot symbol.

14. The method of claim 13 wherein the transmitting marker is a short code.

15. The method of claim 1 wherein, in response to the synchronization maintenance message, the base station processor sends an advance/retard message indicative of when the next synchronization maintenance message should be sent.

16. The method of claim 15 wherein the advance/retard message further comprises a link quality management (LQM) timing bit sent on a LQM channel.

17. The method of claim 16 wherein the LQM timing bit corresponds to 1/8 of a chip time.

18. The method of claim 17 wherein after receiving a predetermined number of consecutive identical LQM timing bits, each successive identical LQM timing bit causes timing to be adjusted at an increased rate.

19. The method of claim 18 wherein the predetermined number is eight.

20. A system for controlling timing of synchronization messages between a subscriber access unit and a base station processor in a wireless CDMA system comprising:

a base station processor;

at least one subscriber access unit;

a protocol converter in the base station processor operable to provide at least one wireless link between the subscriber access unit and the base station processor, the wireless link establishing a synchronization between the subscriber access unit and the base station processor; and

a synchronization maintenance message adapted to be sent from the subscriber access unit to the base station processor, the protocol converter further operable to compute a timing interval in which to send an additional synchronization maintenance message, the synchronization maintenance messages sufficient to maintain an idling mode connection on the wireless link between the subscriber access unit and the base station processor.

21. The system of claim 20 wherein the protocol converter is further operable to determine a duration required to maintain each of the wireless links.

22. The system of claim 21 wherein the timing interval is a timeslot.

23. The system of claim 22 further comprising a plurality of subscriber access units, wherein each of the subscriber access units corresponds to one of a plurality of timeslots.

24. The system of claim 20 wherein the wireless links further comprise active and inactive links and the synchronization maintenance message is transmitted on the inactive links.

25. The system of claim 20 further comprising a plurality of synchronization maintenance messages, wherein the plurality of synchronization maintenance messages maintain the idling mode connection.

26. The system of claim 20 wherein the idling mode connection further comprises maintaining a code phase lock.

27. The system of claim 20 where the protocol converter is further operable to determine a minimal duration for maintaining the idling mode connection.

28. The system of claim 20 further comprising code phase lock circuits having a locking range at the base station, the code phase lock circuits operable to indicate the minimal duration.

29. The system of claim 20 wherein the base station processor is further operable to transmit a timing marker indicative of a reference point for generating timing correction information.

30. The system of claim 29 wherein the timing marker is a pilot symbol.

31. The system of claim 30 wherein the timing marker is a short code.

32. The system of claim 20 wherein the base station processor is further operable to, in response to the synchronization maintenance message, send an advance/retard message indicative of when the next synchronization maintenance message should be sent.

33. The system of claim 31 wherein the advance/retard message further comprises a link quality management (LQM) timing bit sent on an LQM channel.

34. The system of claim 33 wherein the LQM timing bit corresponds to ⅛

of a chip time.

35. The system of claim 33 wherein, after receiving a predetermined number of consecutive identical LQM timing bits, the protocol converter is operable to cause timing to be adjusted at an increased rate upon receiving successive identical LQM timing bit causes.

36. The system of claim 34 wherein the predetermined number is eight.