Method and device for protecting micro electromechanical systems structures during dicing of a wafer
First Claim
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1. A method for protecting a MEMS structure during a dicing of a MEMS wafer to produce individual MEMS dies, comprising the steps of:
- (a) preparing a MEMS wafer having a plurality of MEMS structure sites on a first side and a plurality of through holes on a second side;
(b) mounting, upon the first side of the MEMS wafer, a wafer cap to produce a laminated MEMS wafer, the wafer cap being recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer;
(c) mounting, upon the second side of the MEMS wafer, a layer of dicing tape; and
(d) dicing the laminated MEMS wafer into a plurality of MEMS dies.
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Abstract
A wafer cap protects micro electromechanical system (“MEMS”) structures during a dicing of a MEMS wafer to produce individual MEMS dies. A MEMS wafer is prepared having a plurality of MEMS structure sites thereon. Upon the MEMS wafer, the wafer cap is mounted to produce a laminated MEMS wafer. The wafer cap is recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer. The capped MEMS wafer can be diced into a plurality of MEMS dies without causing damage to or contaminating the MEMS die.
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Citations
156 Claims
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1. A method for protecting a MEMS structure during a dicing of a MEMS wafer to produce individual MEMS dies, comprising the steps of:
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(a) preparing a MEMS wafer having a plurality of MEMS structure sites on a first side and a plurality of through holes on a second side;
(b) mounting, upon the first side of the MEMS wafer, a wafer cap to produce a laminated MEMS wafer, the wafer cap being recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer;
(c) mounting, upon the second side of the MEMS wafer, a layer of dicing tape; and
(d) dicing the laminated MEMS wafer into a plurality of MEMS dies. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 65, 66, 67, 68, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 156)
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28. The method as claimed in 22, wherein a height of the spacer layer prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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29. The method as claimed in 22, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer.
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30. The method as claimed in 22, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer and prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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35. A method for protecting a MEMS structure during a production of individual MEMS dies, comprising the steps of:
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(a) fabricating a MEMS wafer having a plurality of MEMS structure sites on a first side and a plurality of through holes on a second side;
(b) fabricating a wafer cap;
(c) bonding the wafer cap to the first side of the MEMS wafer to produce a laminated MEMS wafer, the wafer cap being recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer;
(d) mounting, upon the second side of the MEMS wafer, a layer of dicing tape; and
(e) dicing the second side of the laminated MEMS wafer into a plurality of MEMS dies.
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62. The method as claimed in 56, wherein a height of the spacer layer prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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63. The method as claimed in 56, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer.
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64. The method as claimed in 56, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer and prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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69. A laminated MEMS wafer, comprising:
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a MEMS wafer having a plurality of MEMS structure sites located on a first side and a plurality of through holes located on a second side;
a removable wafer cap; and
a layer of dicing tape mounted upon the second side of the MEMS wafer;
said removable wafer cap being bonded to the first side of the MEMS wafer to produce a laminated MEMS wafer, the wafer cap being recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer.
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92. The laminated MEMS wafer as claimed in 86, wherein a height of said spacer layer prevents said wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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93. The laminated MEMS wafer as claimed in 86, wherein a height of said spacer layer prevents electrostatically induced damage to said MEMS wafer.
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94. The laminated MEMS wafer as claimed in 86, wherein a height of said spacer layer prevents electrostatically induced damage to said MEMS wafer and prevents said wafer cover from deflecting in such a manner to come in contact with the MEMS structures.
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115. A method for protecting a wafer during a dicing, comprising the steps of:
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(a) mounting, upon a backside of a wafer, a layer of dicing tape, the wafer having a front patterned side and a plurality of etched ports on a backside, the etched ports providing a possible leak path from a backside of the wafer to the front patterned side of the wafer; and
(b) dicing the wafer into a plurality of dies.
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124. A wafer, comprising:
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a wafer having a front patterned side and a plurality of etched ports on a backside, the etched ports providing a possible leak path from a backside of the wafer to the front patterned side of the wafer; and
a layer of dicing tape mounted upon the backside of said wafer.
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140. The method as claimed in 128, wherein a height of the perforated tape prevents electrostatically induced damage.
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155. The laminated MEMS wafer as claimed in 142, wherein a height of said perforated tape prevents electrostatically induced damage.
Specification