Computer system for mutual communication through network and its memory management method

• US 20020083368A1
• Filed: 12/20/2001
• Published: 06/27/2002
• Est. Priority Date: 12/21/2000
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Ueno, Shinji, Abe, Shinji
• Granted Patent: US 6,880,104 B2
• Time in Patent Office: Days
• US Class Current: 714/24
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24

Abstract

In the memory management method, when a failure is detected in the power supplied to a protective memory, a control toward the memory is cut off from a CPU and the power supply is switched to a standby power before the protective memory has some damaging effect; after solution of the power failure, the switching is finished, the control toward the memory is returned to the CPU, and the power supply is returned to an ordinal one; write completion of data is notified to the client at a time when the data sent from the client has been written into the protective memory; whether the last termination is abnormal or normal is checked at the activation; when the last termination is abnormal, the protective memory is returned after memories other than the protective memory are initialized at the activation; and when the last termination is normal, the protective memory is returned and thereafter all the memories are initialized at the activation.

Claims

1. A server for establishing communication upon receipt of access from a client terminal through a network, comprising

a memory protection unit for protecting data stored in a volatile memory to be protected, in the event of a power failure,

said memory protection unit comprises

power monitoring means for detecting a power failure supplied to said above protective memory, and

switch controlling means for switching a control and power supply toward said protective memory, wherein

when a failure is detected in the power supplied to said protective memory, the control toward said memory is switched to a side of said memory protection unit and said power supply is switched to a standby power before said protective memory has some damaging effect.

2. The server as set forth in claim 1, wherein

said switch controlling means

finishes the switching, returns the control toward said memory to a CPU, and returns said power supply to an ordinal one, after solution of the power failure.

3. The server as set forth in claim 1, which

notifies the client of write completion of data at a time when the data sent from said client has been written into said protective memory.

4. The server as set forth in claim 1, which

checks whether said last termination is abnormal or normal, at the activation,

instructs said memory protection unit to return said protective memory after memories other than said protective memory are initialized at the activation, when said last termination is abnormal, while

instructs said memory protection unit to return said protective memory and thereafter initializes all the memories at the activation when said last termination is normal.

5. The server as set forth in claim 1, wherein

said switch controlling means

switches said memory to a low power mode at a time of switching said power supply toward said memory to the standby power.

6. The server as set forth in claim 1, wherein

said memory protection unit

performs backup processing on the data stored in said memory, in response to a user'"'"'s operation, after the switching.

7. The server as set forth in claim 1, wherein

said protective memory is SDRAM or DIMM.

8. The server as set forth in claim 1, wherein

said memory protection unit

has a switch on an I2C bus between SPD of said protective memory that is the DIMM and a memory controller, to cut off a connection between the SPD and the memory controller, in the above switched state.

9. The server as set forth in claim 8, wherein

said memory protection unit

controls said SPD of said protective memory through said I2C bus.

10. The server as set forth in claim 1, wherein

said server unit is Network Attached Storage or File Server.

11. A computer system for establishing mutual communication between a client terminal and a server through a network, wherein

said server

has a memory protection unit for protecting data stored in a volatile memory to be protected in the event of a power failure,

said memory protection unit comprising

power monitoring means for detecting a power failure supplied to said above protective memory, and

switch controlling means for switching a control and power supply toward said protective memory, in which

when a failure is detected in the power supplied to said protective memory, the control toward said memory is switched to a side of said memory protection unit and said power supply is switched to a standby power before said protective memory has some damaging effect.

12. The computer system as set forth in claim 11, wherein

said switch controlling means

finishes the switching, returns the control toward said memory to a CPU of said server, and returns said power supply to an ordinal one, after solution of the power failure.

13. The computer system as set forth in claim 11, wherein

said server

notifies said client of write completion of data at a time when the data sent from said client has been written into said protective memory.

14. The computer system as set forth in claim 11, wherein

said server

checks whether said last termination is abnormal or normal, at the activation,

instructs said memory protection unit to return said protective memory after memories other than said protective memory are initialized at the activation, when said last termination is abnormal, while

instructs said memory protection unit to return said protective memory and thereafter initializes all the memories at the activation when said last termination is normal.

15. The computer system as set forth in claim 11, wherein

said switch controlling means

switches said memory to a low power mode at a time of switching said power supply toward said memory to the standby power.

16. The computer system as set forth in claim 11, wherein

said server is Network Attached Storage or File Server.

18. The memory management method as set forth in claim 17, further comprising

a step of finishing the switching, returning the control toward said memory to a CPU, and returning said power supply to an ordinal one, after solution of the power failure.

19. The memory management method as set forth in claim 17, further comprising

a step of notifying said client of write completion of data at a time when the data sent from said client has been written into said protective memory.

20. The memory management method as set forth in claim 17, further comprising:

a step of checking whether said last termination is abnormal or normal, at the activation;

a step of returning said protective memory after initializing memories other than said protective memory at the activation, when said last termination is abnormal; and

a step of returning said protective memory and thereafter initializing all the memories at the activation when said last termination is normal.

21. The memory management method as set forth in claim 17, further comprising

a step of switching said memory to a low power mode at a time of switching said power supply toward said memory to the standby power.

22. The memory management method as set forth in claim 17, further comprising

a step of performing backup processing on the data stored in said memory, in response to a user'"'"'s operation, after the switching.

23. The memory management method as set forth in claim 17, wherein

said protective memory is SDRAM or DIMM.

24. The memory management method as set forth in claim 17, further comprising

a step of, with a switch provided on an I2C bus between SPD of said protective memory that is the DIMM and a memory controller, cutting off a connection between the SPD and the memory controller, in the switched state.

25. The memory management method as set forth in claim 24, further comprising

a step of controlling said SPD of said protective memory through said I2C bus.

27. The memory management program as set forth in claim 26, further comprising

a function of finishing the switching, returning the control toward said memory to said CPU, and returning said power supply to an ordinal one, after solution of the power failure.

28. The memory management program as set forth in claim 26, further comprising

a function of notifying said client of write completion of data at a time when the data sent from said client has been written into said protective memory.

29. The memory management program as set forth in claim 26, further comprising:

a function of checking whether said last termination is abnormal or normal, at the activation;

a function of returning said protective memory after initializing memories other than said protective memory at the activation, when said last termination is abnormal; and

a function of returning said protective memory and thereafter initializing all the memories at the activation when said last termination is normal.

17. A memory management method of a server for establishing communication upon receipt of access from a client terminal through a network, comprising the following steps of:

detecting a power failure supplied to said above protective memory, and

switching a control and power supply toward said protective memory, in which

when a failure is detected in the power supplied to said protective memory, the control toward said memory is cut off from a CPU and said power supply is switched to a standby power before said protective memory has some damaging effect,

so as to protect the data stored in said protective volatile memory, in the event of a power failure.

26. A memory management program of a server for establishing communication upon receipt of access from a client terminal through a network, comprising the following functions of:

detecting a power failure supplied to a protective memory, and

switching a control and power supply toward said protective memory, in which

when a failure is detected in the power supplied to said protective memory, the control toward said memory is cut off from a CPU and said power supply is switched to a standby power before said protective memory has some damaging effect,

so as to protect the data stored in said protective volatile memory, in the event of a power failure.