Low-power organic light emitting diode pixel circuit

• US 20020084463A1
• Filed: 01/04/2001
• Published: 07/04/2002
• Est. Priority Date: 01/04/2001
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Sanford, James Lawrence, Schlig, Eugene S.
• Granted Patent: US 6,580,657 B2
• Time in Patent Office: Days
• US Class Current: 257/82
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2310/0256 with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
• CPC Class Codes: G09G 2310/063 Waveforms for resetting the whole screen at once
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/046 Dealing with screen burn-in prevention or compensation of the effects thereof
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 2320/0633 by amplitude modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: G11C 11/419 Read-write [R-W] circuits
• CPC Class Codes: H10K 59/00 : Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays

Abstract

A pixel circuit comprises an organic light emitting diode (OLED), and a static memory for storing data that represents an operational state of the OLED. In alternative embodiments, a pixel circuit may include a complementary metal oxide semiconductor (CMOS) circuit for controlling the OLED, a protection circuit for protecting the CMOS circuit from an over-voltage condition, and a current source with a field effect transistor (FET) having a static gate to source voltage that is greater than a threshold voltage of the FET.

Claims

1. A pixel circuit comprising:

an organic light emitting diode (OLED); and

a static memory for storing data that represents an operational state of said OLED.

2. The pixel circuit of claim 1, further comprising a single bit line for inputting a signal that represents said data to, and outputting a signal that represents said data from, said static memory.

3. The pixel circuit of claim 1, further comprising:

a first input to enable a writing of said data to said static memory; and

a second input to enable a reading of said data from said static memory.

4. The pixel circuit of claim 1, wherein said static memory comprises:

a first component through which a data signal is coupled to provide a source signal;

a second component having an input for receiving said source signal from said first component, and for being driven to a state to produce an output that represents said stored data; and

a third component having an input coupled to said output of said second component, and an output coupled to said input of said second component, for providing a latch signal to maintain said state of said second component after a removal of said source signal.

5. The pixel circuit of claim 4,

wherein said first component provides a first drive current, and

wherein said third component provides a second drive current that is less than said first drive current.

6. The pixel circuit of claim 1,

wherein said pixel circuit comprises a material disposed on a substrate,

wherein said material is selected from the group consisting of crystalline silicon, amorphous silicon, polysilicon, micro crystalline silicon, an organic material and a polymer material, and

wherein said substrate is selected from the group consisting of silicon, glass, plastic, ceramic and sapphire (AL₂O₃).

7. A pixel circuit comprising:

an organic light emitting diode (OLED);

a complementary metal oxide semiconductor (CMOS) circuit for controlling said OLED; and

a protection circuit for protecting said CMOS circuit from over-voltage damage.

8. The pixel circuit of claim 7, wherein said CMOS circuit comprises:

a current source; and

a cascode device in an output stage of said CMOS circuit.

9. The pixel circuit of claim 8, wherein said cascode device is configured with a floating well.

10. The pixel circuit of claim 7, wherein said protection circuit limits, to a predetermined value, a current through said CMOS circuit.

11. The pixel circuit of claim 7, wherein said protection circuit limits, to a predetermined value, a voltage across said CMOS circuit.

12. The pixel circuit of claim 7, further comprising a current limiting resistor in series with said OLED.

13. The pixel circuit of claim 12, wherein said resistor comprises thin film.

14. The pixel circuit of claim 12, wherein said resistor comprises undoped polysilicon.

15. The pixel circuit of claim 7, wherein said CMOS circuit comprises a circuit for reverse biasing said OLED to remove trapped charge from said OLED.

16. The pixel circuit of claim 15, wherein said circuit for reverse biasing said OLED comprises:

an n-type metal oxide semiconductor (NMOS) transistor in series with said OLED; and

a p-type metal oxide semiconductor (PMOS) transistor in series with said NMOS transistor,

wherein said NMOS transistor and said PMOS transistor provide a reverse bias current path from an anode of said OLED to ground.

17. The pixel circuit of claim 7, wherein said CMOS circuit comprises a duty factor circuit for controlling an average current through said OLED.

18. The pixel circuit of claim 17, wherein said duty factor circuit permits a reverse biasing of said OLED to remove trapped charge from said OLED.

19. The pixel circuit of claim 7, wherein said CMOS circuit comprises a field effect transistor (FET) current source.

20. The pixel circuit of claim 19, wherein said FET has a static gate to source voltage that is greater than a threshold voltage of said FET.

21. The pixel circuit of claim 19, wherein said FET has a channel length that is greater than a channel width of said FET.

22. The pixel circuit of claim 7, wherein said CMOS circuit comprises:

a first input for setting a maximum brightness of said pixel; and

a second input for controlling a duty factor of said pixel to set a brightness of said pixel to less than said maximum brightness.

23. The pixel circuit of claim 7, wherein said pixel circuit comprises a material disposed on a substrate,

wherein said material is selected from the group consisting of crystalline silicon, amorphous silicon, polysilicon, micro crystalline silicon, an organic material and a polymer material, and

wherein said substrate is selected from the group consisting of silicon, glass, plastic, ceramic and sapphire (AL₂O₃).

24. The pixel circuit of claim 7, wherein said protection circuit is capable of providing a forward bias current path for said OLED in order to illuminate said OLED.

26. The pixel circuit of claim 25, wherein said FET has a channel length that is greater than a channel width of said FET.

28. The display of claim 27, wherein each said OLED comprises an electrode, wherein said OLEDs are separated from one another by a pitch that is uniform throughout said array, and wherein said pixel circuits are separated from one another by a pitch that is not uniform throughout said array.

29. The display of claim 27, further comprising a circuit for simultaneously setting all of said OLEDs to a uniform operational state.

30. The display of claim 29, wherein said uniform operational state of said OLEDs is OFF, and wherein said display is controlled by a processor that subsequently sets selected individuals of said OLEDs ON.

31. The display of claim 29, wherein said circuit is addressed by a processor via a memory bus.

32. The display of claim 27, wherein each of said pixel circuits is addressed by a processor via a memory bus.

33. The display of claim 27, wherein said array is a component of an electronic watch.

25. A pixel circuit comprising:

an organic light emitting diode (OLED); and

a complementary metal oxide semiconductor (CMOS) circuit for controlling said OLED,

wherein said CMOS circuit comprises a current source comprising a field effect transistor (FET) having a static gate to source voltage that is greater than a threshold voltage of said FET.

27. A display comprising an array of pixel circuits, wherein each of said pixel circuits comprises:

an organic light emitting diode (OLED); and

a static memory for storing data that represents an operational state of said OLED.