Stacked voltage rails for low-voltage DC distribution

• US 20020084824A1
• Filed: 12/28/2000
• Published: 07/04/2002
• Est. Priority Date: 12/28/2000
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hathaway, David James, Dean, Alvar Antonio, Ventrone, Sebastian Theodore, Cohn, John Maxwell, Perry, Patrick Edward
• Granted Patent: US 6,479,974 B2
• Time in Patent Office: Days
• US Class Current: 327/309
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A system and method for providing on-chip voltage distribution and regulation. In accordance with the system of the present invention, an IC chip includes a source voltage plane having a source supply rail for supplying power to the IC chip and a source ground rail for sinking power supplied therefrom. At least one intermediate ground rail is connected between the source supply rail and the source ground rail to divide the source voltage plane into multiple intermediate voltage planes. The intermediate ground rail serves as a supply rail for a subsequent intermediate voltage plane such that the intermediate voltage planes are series-connected.

Claims

1. An on-chip voltage distribution circuit comprising:

a source voltage plane having a source supply rail for supplying power to an IC chip and a source ground rail for sinking power supplied therefrom; and

at least one intermediate ground rail connected between said source supply rail and said source ground rail for dividing said source voltage plane into a plurality of intermediate voltage planes.

2. The on-chip voltage distribution circuit of claim 1, wherein said at least one intermediate ground rail serves as a supply rail for a subsequent intermediate voltage plane such that said plurality of intermediate voltage planes are series-connected.

3. The on-chip voltage distribution circuit of claim 1, further comprising a level shifter circuit connected between at least two of said intermediate voltage planes for facilitating inter-plane communication.

4. The on-chip voltage distribution circuit of claim 3, wherein said level shifter comprises a coupling capacitor for providing DC isolation between said at least two intermediate voltage planes.

5. The on-chip voltage distribution circuit of claim 4, wherein said level shifter further comprises a damper circuit on the output side of said coupling capacitor for clamping signals to the DC level on the output side of said coupling capacitor.

6. The on-chip voltage distribution circuit of claim 4, wherein said level shifter further comprises:

a tri-state inverter on the input side of said coupling capacitor that delivers an incoming signal to said coupling capacitor in response to an asserted control signal;

a clock for delivering said control signal to said tri-state inverter; and

a pair of switches for driving both sides of said coupling capacitor to a known voltage level in response to deassertion of said control signal.

7. The on-chip voltage distribution circuit of claim 4, wherein said level shifter circuit further comprises a latch on the output side of said coupling capacitor for holding a last state.

8. The on-chip voltage distribution circuit of claim 1, further comprising voltage regulation means for maintaining a specified voltage drop across each of said plurality of intermediate voltage planes.

9. The on-chip voltage distribution circuit of claim 8, wherein each of said intermediate voltage planes includes a chip-specific circuit, said on-chip voltage distribution circuit further comprising load detection means for determining the relative load presented by each of said chip-specific circuits such that the circuit load for each of said intermediate voltage planes may be determined.

10. The on-chip voltage distribution circuit of claim 9, wherein said load detection means comprises:

a comparator; and

a feedback circuit for providing feedback from said voltage regulation means to said comparator such that said comparator detects whether or not the loads presented by said chip-specific circuits within each of said intermediate voltage planes are balanced.

11. The on-chip voltage distribution circuit of claim 9, further comprising circuit means for balancing the load presented by each of said chip-specific circuits such that each of said intermediate voltage planes consumes an equal amount of power across said source voltage plane.

12. The on-chip voltage distribution circuit of claim 11, wherein said load detector comprises means for determining the switching factor for each of said chip-specific circuits.

13. The on-chip voltage distribution circuit of claim 12, wherein said load balancing means comprises a switching factor modulator for adjusting the switching factors of each of said intermediate voltage planes in accordance with feedback from said load detector.

14. The on-chip voltage distribution circuit of claim 11, wherein each of said intermediate voltage planes includes a replicated chip-specific circuit, and wherein said load balancing means comprises selection means for selectively activating portions of said replicated chip-specific circuit in response to the relative load presented by said chip-specific circuits.

15. The on-chip voltage distribution circuit of claim 8, wherein said voltage regulation means comprises a plurality of voltage regulators, said on-chip voltage distribution circuit further comprising a regulator adjustment device for maintaining at least one of said voltage regulators at a zero current draw condition.

16. The on-chip voltage distribution circuit of claim 15, wherein said regulator adjustment device includes hardware or software means for detecting a condition in which one of said voltage regulators maintains a constant current level while the current draw of the remaining voltage regulators increases.

17. The on-chip voltage distribution circuit of claim 16, wherein said regulator adjustment device further comprises circuit means responsive to said condition in which one of said voltage regulators maintains a constant current level while the current draw of the remaining voltage regulators increases for reducing the current drawn from said one voltage regulator.