Switching database cache management system

• US 20020089983A1
• Filed: 12/12/2001
• Published: 07/11/2002
• Est. Priority Date: 12/18/2000
• Status: Abandoned Application

• Current Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Original Assignee: Zarlink Semiconductor Inc. (Microchip Technology Incorporated)
• Inventors: Lin, Changhwa, Wen, Zhong
• Application Number:
  US10/015,497
• Publication Number:
  US 20020089983A1
• Time in Patent Office: Days
• US Class Current: 370/392
• CPC Class Codes: H04L 45/742 Route cache; Operation thereof
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches
• CPC Class Codes: H04L 49/354 for supporting virtual local area networks [VLAN]

Abstract

A network switch includes a plurality of ports, a packet engine for transferring incoming packets to an appropriate outgoing port dependent on a destination address carried in said packet, and a switching database providing switching information to said packet engine, said switching database comprising a low speed main database and a high speed cache, and a controller for transferring switching data between said database and said cache in accordance with a predetermined control policy.

Claims

1. A network switch comprising a plurality of ports, a packet engine for transferring incoming packets to an appropriate outgoing port dependent on a destination address carried in said packet, and a switching database providing switching information to said packet engine, said switching database comprising a low speed main database and a high speed cache, and a controller for transferring switching data between said database and said cache in accordance with a predetermined control policy.

2. A network switch as claimed in claim 1, wherein said high speed cache includes a high speed search engine implemented in hardware.

3. A network switch as claimed in claim 1, wherein said controller is a hierarchical instruction set microcontroller.

4. A network switch as claimed in claim 3, wherein said high speed cache is located in a fast path to support packet forwarding at full line rate.

5. A method of forwarding packets in a network switch, comprising providing a switching database for storing destination address information, said switching database being divided into a main lower speed database and a high speed cache;

searching for address information for an incoming packet first in said high speed cache, and in the event said information is not in said high speed cache subsequently searching for said information in said lower speed lower speed database; and

controlling the transfer of data between said high speed cache and said lower speed database in accordance with a predetermined policy.

6. A method as claimed in claim 5, wherein database entries are deleted or transferred to said lower speed database when the resources in said high speed cache become low.

7. A method as claimed in claim 6, wherein database entries that have not been used for a predetermined period of time are marked for deletion.

8. A method as claimed in claim 7, wherein in the event that an entry cannot be found for an incoming packet, said incoming packet is dropped or forwarded to a designated port group that includes all or part of the ports of said network switch.