Method for managing circuits in a multistage cross connect

• US 20020093952A1
• Filed: 06/28/2001
• Published: 07/18/2002
• Est. Priority Date: 06/30/2000
• Status: Abandoned Application

• Current Assignee: Sycamore Networks Incorporated
• Original Assignee: Sycamore Networks Incorporated
• Inventors: Gonda, Rumi Sheryar
• Application Number:
  US09/894,365
• Publication Number:
  US 20020093952A1
• Time in Patent Office: Days
• US Class Current: 370/369
• CPC Class Codes: H04Q 3/68 Grouping or interlacing selector groups or stages

Abstract

To alleviate the problems associated with modifying switching software for each individual hardware components, a logical switch abstraction is provide that is separated from an underlying physical switch abstraction, the physical abstraction being dependent upon the underlying components used in the switch. The abstraction is a model of the connection paths and switching elements of the switch. By efficiently determining connections within the logical abstraction and mapping those connections in the physical abstraction, changes in underlying hardware has a minimal effect on switching software. That is, adding new hardware to the switch has minimal effect on how connections are determined through the logical abstraction. More particularly, when a hardware type is changed or added, only mapping information identifying relations between components in the logical and physical abstractions changes. Because the logical abstraction is independent of the hardware implementation, connections are more easily managed. Further, an efficient method of provisioning is provided wherein the amount of connection time is reduced.

Claims

1. A method for determining a connection in a network system, the method comprising:

defining a logical abstraction having a plurality of switch stages, each stage having at least one port;

defining a physical abstraction having an associated plurality of components wherein at least one component has a physical port; and

mapping the at least one port in the logical abstraction to the physical port of the component associated with the physical abstraction.

2. The method according to claim 1, further comprising:

determining a logical path through the plurality of switch stages defined by the logical abstraction.

3. The method according to claim 1, wherein each of the plurality of connections between each stages are represented by a level of a logical representation, the logical representation holding state information indicating an availability of said connections, the plurality of switch stages having a plurality of connection between stages, and the method further comprises setting up a circuit between an ingress and egress port of the network system.

4. The method according to claim 3, wherein the setting up operation comprises:

processing a request to establish the circuit;

determining an egress port of a third switch stage of the plurality of switch stages in the logical abstraction;

locating, within the logical representation, an available connection between the third switch stage and a second switch stage of the plurality of switch stages; and

locating, within the tree representation, an available connection between the second stage and a first switch stage in which the ingress port resides.

5. The method according to claim 4, wherein if it is determined that an available connection does not exist between the ingress and egress ports, the method further comprises searching another second switch stage for an available connection.

6. The method according to claim 4, wherein the location operations include identifying a first found connection.

7. The method according to claim 4, wherein the location operations include identifying a connection using a round robin search.

8. The method according to claim 4, wherein the location operations include identifying a connection using a randomization process.

9. The method according to claim 1, wherein the logical abstraction includes logical switch elements having logical ports identified by a logical port number, and wherein the mapping operation further comprises mapping a logical port number to the physical port of the component.

10. The method according to claim 1, further comprising mapping based on a combination of chassis, slot, port, wave, and channel.

11. The method according to claim 1, wherein the logical abstraction is modeled as a generic Clos switch architecture.

12. The method according to claim 1, wherein the physical abstraction is modeled as a hardware-specific Clos switch architecture.

13. The method according to claim 4, wherein the logical representation is stored in at least one table in memory of the switch.

14. The method according to claim 4, wherein the logical representation is a tree-like data structure stored in a memory associated with the switch.

15. The method according to claim 4, further comprising determining whether an available link has sufficient resources.

16. The method according to claim 3, wherein the setting up operation includes setting up a connection in a direction from the ingress port to the egress port.

17. The method according to claim 3, wherein the setting up operation includes setting up a connection in a direction from the egress port to the ingress port.

18. The method according to claim 1, wherein the plurality of switch stages includes at least three switch stages.

20. The computer-readable medium according to claim 19, further comprising:

determining a logical path through the plurality of switch stages defined by the logical abstraction.

21. The computer-readable medium according to claim 19, wherein each of the plurality of connections between each stages are represented by a level of a logical representation, the logical representation holding state information indicating an availability of said connections, the plurality of switch stages having a plurality of connection between stages, and the method further comprises setting up a circuit between an ingress and egress port of the network system.

22. The computer-readable medium according to claim 21, wherein the setting up operation comprises:

processing a request to establish the circuit;

determining an egress port of a first switch stage of the plurality of switch stages in the logical abstraction;

locating, within the logical representation, an available connection between the first switch stage and a second switch stage of the plurality of switch stages; and

locating, within the logical representation, an available connection between the second stage and a third switch stage in which the ingress port resides.

23. The computer-readable medium according to claim 22, wherein if it is determined that an available connection does not exist between the ingress and egress ports, the method further comprises searching another second switch stage for an available connection.

24. The computer-readable medium according to claim 22, wherein the location operations include identifying a first found connection.

25. The computer-readable medium according to claim 22, wherein the location operations include identifying a connection using a round robin search.

26. The computer-readable medium according to claim 22, wherein the location operations include identifying a connection using a randomization process.

27. The computer-readable medium according to claim 19, wherein the logical abstraction includes logical switch elements having logical ports identified by a logical port number, and wherein the mapping operation further comprises mapping a logical port number to the physical port of the component.

28. The computer-readable medium according to claim 19, further comprising mapping based on a combination of chassis, slot, port, wave, and channel.

29. The computer-readable medium according to claim 19, wherein the logical abstraction is modeled as a generic Clos switch architecture.

30. The computer-readable medium according to claim 19, wherein the physical abstraction is modeled as a hardware-specific Clos switch architecture.

31. The computer-readable medium according to claim 22, wherein the logical representation is stored in at least one table in memory of the switch.

32. The computer-readable medium according to claim 22, further comprising determining whether an available link has sufficient resources.

33. The computer-readable medium according to claim 21, wherein the setting up operation includes setting up a connection in a direction from the ingress port to the egress port.

34. The computer-readable medium according to claim 21, wherein the setting up operation includes setting up a connection in a direction from the egress port to the ingress port.

35. The computer-readable medium according to claim 19, wherein the plurality of switch stages includes at least three switch stages.

36. The computer-readable medium according to claim 22, wherein the logical representation is a tree-like data structure stored in a memory associated with the switch.

19. A computer-readable medium, when executed in a network communication system, performs a method for determining a connection in a network system, the method comprising:

defining a logical abstraction having a plurality of switch stages, each stage having at least one port;

defining a physical abstraction having an associated plurality of components wherein at least one component has a physical port; and

mapping the at least one port in the logical abstraction to the physical port of the component associated with the physical abstraction.