Distance measurement using half-duplex RF techniques

• US 20020094786A1
• Filed: 01/16/2001
• Published: 07/18/2002
• Est. Priority Date: 01/16/2001
• Status: Active Grant

• Current Assignee: AeroScout (US) LLC (Stanley Black & Decker, Inc.)
• Original Assignee: AeroScout Incorporated (Stanley Black & Decker, Inc.)
• Inventors: Berliner, Shlomo, Holzkaner, Uri, Mirodin, Edward
• Granted Patent: US 6,731,908 B2
• Time in Patent Office: Days
• US Class Current: 455/67.16
• CPC Class Codes: G01S 13/84 for distance determination by phase measurement
• CPC Class Codes: H04B 1/7156 Arrangements for sequence synchronisation

Abstract

A system, apparatus, and method for determining the distance between two objects using an indirect propagation delay measurement is disclosed. A frequency hopping scheme (such as the Bluetooth™ technology) is used to measure the relative phase offset of the received signal between the various frequencies. For a given distance between the objects, the phase offset vs. frequency curve is a straight line with the slope dependent upon the measured distance. After the phase of the received signals is detected, the data is plotted on a curve and the slope is calculated.

A wireless slave device remains phase locked with another device in a half-duplex communication mode by employing a low-drift phase locked loop employing a voltage controlled crystal oscillator. The phase locked loop further employs a mechanism that provides immunity from transitory phase slip at a time when the loop is opened.

Claims

1. A half-duplex wireless remote device for use in a distance measurement system, comprising:

a receiver for receiving a first radio frequency (RF) signal during a first time slot An from a wireless communication device, the first RF signal including a sequence of carriers fn, where n is a plurality of integers, wherein the sequence of carriers fn are phase coherent with a first reference signal generated at the wireless communication device, the receiver generating a second reference signal from the received first RF signal during the first time slot An, wherein the second reference signal is phase coherent with the received first RF signal;

a phase locked loop (PLL) for generating a third reference signal synchronized in frequency and phase with the second reference signal;

a synthesizer for generating a second RF signal, the second RF signal being phase coherent with the third reference signal and including a sequence of carriers corresponding to the carriers fn of the first RF signal; and

a transmitter for transmitting the second RF signal during a second time slot Bn, wherein the first time slot An and the second time slot Bn alternatingly repeat as n changes.

2. The wireless remote device according to claim 1, wherein the receiver divides the received first RF signal by a series of integers corresponding to the sequence of carriers fn of the first RF signal, thereby generating the second reference signal.

3. The wireless remote device according to claim 1, wherein

the sequence of carriers fn of the first RF signal are modulated with a modulation signal,

the phase of the modulation signal is coherent with each of the phases of the sequence of carriers fn of the first RF signal, and

the receiver discriminates the received first RF signal, thereby recovering the second reference signal.

4. The wireless remote device according to claim 1, wherein the carriers fn of the first RF signal have the same frequencies as the corresponding carriers of the second RF signal.

5. The wireless remote device according to claim 1, wherein the carriers fn of the first RF signal have different frequencies than the corresponding carriers of the second RF signal.

6. The wireless remote device according to claim 1, wherein the PLL comprises:

a switched phase comparator for comparing the phase of the second and third reference signals and generating a phase output signal indicative of phase difference between the second and third RF signal;

an integrator for filtering the phase output signal and generating a voltage signal;

a voltage controlled oscillator (VCO) controlled by the voltage signal and generating a system clock; and

a divider for dividing the frequency of the system clock by an integer N to generate the third reference signal, wherein the third reference signal continues after the second reference signal is removed.

7. The wireless remote device according to claim 6, wherein the VCO is a voltage controlled crystal oscillator (VCXO) having a narrow frequency span.

8. The wireless remote device according to claim 6, further comprising

a secondary PLL for generating a local oscillator signal, wherein the system clock is used by the secondary PLL to synchronize the local oscillator signal, and wherein the receiver uses the local oscillator signal to tune to the carrier frequencies of the first RF signal.

9. The wireless remote device according to claim 6, wherein the switched phase comparator includes:

a pulse generator for generating a pulse signal corresponding to the second reference signal;

a logical gate having as an input the pulse signal and a digital control signal, wherein the gate passes the pulse signal when the digital control signal is in a first state indicative of closed loop operation and blocks the pulse signal when the logical control signal is in a second state indicative of open loop operation; and

a digital comparator having as inputs the gated pulse signal and the third reference signal, wherein when the third reference signal leads the second reference signal, the comparator causes an output control signal to decrease in value and when the third reference signal lags the second reference signal, the comparator causes an output control signal to increase in value.

10. The wireless remote device according to claim 9, wherein the switched phase comparator further comprises:

a first gate having as inputs the third reference signal and the gated pulse signal, wherein when the gated pulse and the third reference signal are both asserted, the output of the first gate biases a first diode so that current flows into an output node; and

a second gate having as inputs an inverse of the third reference signal and the gated pulse signal, wherein when the gated pulse signal and the inverse of the third reference signal are both asserted, the output of the second gate biases a second diode so that current flows out of the output node, wherein the current at the output node is representative of the value of the output control signal.

11. A system for determining distance using half-duplex communication, comprising:

a wireless communication device for transmitting a first radio frequency (RF) signal during a first time slot An and receiving a second RF signal at a time slot Bn, the first RF signal including a sequence of carriers fn, where n is a plurality of integers, wherein the sequence of carriers fn are phase coherent with a first reference signal; and

a wireless remote device for receiving the first RF signal and transmitting the second RF signal, the wireless remote device comprising;

a receiver for receiving the first RF signal and generating a second reference signal phase coherent with the received first RF signal;

a phase locked loop (PLL) for generating a third reference signal synchronized in frequency and phase with the second reference signal;

a synthesizer for generating the second RF signal, the second RF signal being phase coherent with the third reference signal and including a sequence of carriers corresponding to the carriers fn of the first RF signal; and

a transmitter for transmitting the second RF signal during a second time slot Bn, wherein the first time slot An and the second time slot Bn alternatingly repeat as n changes, wherein the wireless communication device compares the phase of the first and second RF signal to calculate distance between the wireless communication device and the wireless remote device.

12. The system according to claim 11, wherein the receiver divides the received first RF signal by a series of integers corresponding to the sequence of carriers fn of the first RF signal, thereby generating the second reference signal.

13. The system according to claim 11, wherein the wireless communication device modulates the sequence of carriers fn of the first RF signal with a modulation signal, wherein the phase of the modulation signal is coherent with each of the phases of the sequence of carriers fn of the first RF signal, and wherein the receiver discriminates the received first RF signal, thereby recovering the second reference signal.

14. The system according to claim 11, wherein the carriers fn of the first RF signal have the same frequencies as the corresponding carriers of the second RF signal.

15. The system according to claim 11, wherein the carriers fn of the first RF signal have different frequencies than the corresponding carriers of the second RF signal.

16. The system according to claim 11, wherein the PLL comprises:

a switched phase comparator for comparing the phase of the second and third reference signals and generating a phase output signal indicative of phase difference between the second and third RF signal;

an integrator for filtering the phase output signal and generating a voltage signal;

a voltage controlled oscillator (VCO) controlled by the voltage signal and generating a system clock; and

a divider for dividing the frequency of the system clock by an integer N to generate the third reference signal, wherein the third reference signal continues after the second reference signal is removed.

17. The system according to claim 16, wherein the VCO is a voltage controlled crystal oscillator (VCXO) having a narrow frequency span.

18. The system according to claim 16, wherein the receiver further comprises:

a secondary PLL for generating a local oscillator signal, wherein the system clock is used by the secondary PLL to synchronize the local oscillator signal, and wherein the receiver uses the local oscillator signal to tune to the carrier frequencies of the first RF signal.

19. The system according to claim 16, wherein the switched phase comparator includes:

a pulse generator for generating a pulse signal corresponding to the second reference signal;

a logical gate having as an input the pulse signal and a digital control signal, wherein the gate passes the pulse signal when the digital control signal is in a first state indicative of closed loop operation and blocks the pulse signal when the logical control signal is in a second state indicative of open loop operation; and

a digital comparator having as inputs the gated pulse and the third reference signal, wherein when the third reference signal leads the second reference signal, the comparator causes an output control signal to decrease in value and when the third reference signal lags the second reference signal, the comparator causes an output control signal to increase in value.

20. The system according to claim 19, wherein the switched phase comparator further comprises:

a first gate having as inputs the third reference signal and the gated pulse signal, wherein when the gated pulse and the third reference signal are both asserted, the output of the first gate biases a first diode so that current flows into an output node; and

a second gate having as inputs an inverse of the third reference signal and the gated pulse signal, wherein when the gated pulse signal and the inverse of the third reference signal are both asserted, the output of the second gate biases a second diode so that current flows out of the output node, wherein the current at the output node is representative of the value of the output control signal.

21. A method of phase locking a wireless communication device and a wireless remote device, comprising the steps of:

receiving a first radio frequency (RF) signal during a first time slot An from the wireless communication device, the first RF signal including a sequence of carriers fn, where n is a plurality of integers, wherein the sequence of carriers fn are phase coherent with a first reference signal generated at the wireless communication device;

generating a second reference signal during the time slot An from the second reference signal, the second reference signal being phase coherent with the received first RF signal;

generating a third reference signal synchronized in frequency and phase with the second reference signal;

generating a second RF signal, the second RF signal being phase coherent with the third reference signal and including a sequence of carriers corresponding to the carriers fn of the first RF signal; and

transmitting the second RF signal during a second time slot Bn, wherein the first time slot An and the second time slot Bn alternatingly repeat as n changes.

22. The method according to claim 21, further comprising the steps of dividing the received first RF signal by a series of integers corresponding to the sequence of carriers fn of the first RF signal, thereby generating the second reference signal.

23. The method of claim 21, further comprising the steps of

modulating the sequence of carriers fn of the first RF signal with a modulation signal, wherein the phase of the modulation signal is coherent with each of the phases of the sequence of carriers fn of the first RF signal;

and

discriminating the received first RF signal, thereby recovering the second reference signal.

24. The method according to claim 21, wherein the carriers fn of the first RF signal have the same frequencies as the corresponding carriers of the second RF signal.

25. The method according to claim 21, wherein the carriers fn of the first RF signal have different frequencies than the corresponding carriers of the second RF signal.

26. The method according to claim 21, further comprising the steps of:

comparing the phase of the second and third reference signals to generate a phase output signal indicative of phase difference between the second and third RF signal;

filtering the phase output signal to generate a voltage signal;

generating a system clock having a frequency proportional to the voltage signal; and

dividing the frequency of the system clock by an integer N to generate the third reference signal, wherein the third reference signal continues after the second reference signal is removed.

27. The method according to claim 26, wherein the system clock is generated by a voltage controlled crystal oscillator (VCXO) having a narrow frequency span.

28. The method according to claim 26, further comprising the steps of:

synchronizing a local oscillator signal with the system clock; and

tuning to the carrier frequencies fn of the first RF signal by using the synchronized local oscillator signal.