Image display unit and method of producing image display unit

• US 20020096994A1
• Filed: 01/30/2002
• Published: 07/25/2002
• Est. Priority Date: 07/18/2000
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Iwafuchi, Toshiaki, Doi, Masato, Oohata, Toyoharu
• Granted Patent: US 6,613,610 B2
• Time in Patent Office: Days
• US Class Current: 313/495
• CPC Class Codes: G02F 1/13613 the semiconductor element being formed on a first substrate and thereafter transferred to the final cell substrate
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68354 used to support diced chips prior to mounting
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/06102 the bonding areas being at different heights
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16245 the item being metallic
• CPC Class Codes: H01L 2224/1703 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/18 High density interconnect [HDI] connectors; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73267 : Layer and HDI connectors
• CPC Class Codes: H01L 2224/81001 : involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/81136 : involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/92244 : the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/18 : High density interconnect [HDI] connectors; Manufacturing methods related thereto interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0753 : the devices being arranged next to each other
• CPC Class Codes: H01L 27/12 : the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 : the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/156 : two-dimensional arrays
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15788 : Glasses, e.g. amorphous oxides, nitrides or fluorides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 : Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/24 : of the light emitting region, e.g. non-planar junction
• CPC Class Codes: Y10S 438/982 : Varying orientation of devices in array

Abstract

An image display unit and a method of producing the image display unit, wherein the image display unit includes an array of a plurality of light emitting devices for displaying an image, and wherein the method of producing the image display unit employs, for example, a space expanding transfer, whereby a first transfer step includes transferring the devices arrayed on a first substrate to a temporary holding member such that the devices are spaced from each other with a pitch larger than a pitch of the devices arrayed on the first substrate, a second holding step includes holding the devices on the temporary holding member, and a third transfer step includes transferring the devices held on the temporary holding member onto a second board such that the devices are spaced from each other with a pitch larger than the pitch of the devices held on the temporary holding member.

Claims

1. A method of re-arraying a plurality of devices arrayed on a first substrate each having a first pitch onto a second substrate, the method comprising the steps of:

transferring the devices to a temporary holding member such that the devices are spaced apart, each having a second pitch, wherein the second pitch is larger than the first pitch;

holding the devices on the temporary holding member; and

transferring the devices to the second substrate such that the devices are spaced apart, each having a third pitch, wherein the third pitch is larger than the second pitch.

2. The method as claimed in claim 1, wherein the second pitch is about an integer multiple of the first pitch;

and

wherein the third pitch is about an integer multiple of the second pitch.

3. The method as claimed in claim 1, wherein, after the step of transferring the devices to the temporary holding member, the method further comprises the steps of:

molding the devices with a resin;

forming electrodes of the devices on the resin; and

processing the resin to divide the resin into a plurality of sections.

4. The method as claimed in claim 1, wherein the step of transferring the devices to the temporary holding member includes selectively transferring from the first substrate the devices located at positions spaced from each other when the first substrate is opposed to the temporary holding member.

5. The method as claimed in claim 1, wherein the step of transferring the devices to the second substrate includes selectively transferring from the temporary holding member the devices located at positions spaced from each other when the temporary holding member is opposed to the second substrate.

6. The method as claimed in claim 1, wherein the devices are transferred from the temporary holding member to a position adjacent to each other on the second substrate that is different from a position of the devices on the temporary holding member.

7. The method as claimed in claim 1, wherein the step of transferring the devices to the temporary holding member and the step of transferring the devices held on the temporary holding member to the second substrate are performed employing at least one of a mechanical mechanism and an optical mechanism.

8. The method as claimed in claim 7, wherein the mechanical mechanism is capable of selectively transferring the devices while imparting a dynamic energy to each of the devices.

9. The method as claimed in claim 7, wherein the mechanical mechanism is capable of transferring the devices by selectively attracting the devices.

10. The method as claimed in claim 7, wherein the optical mechanism is capable of selectively transferring the devices while imparting a light energy to each of the devices by light irradiation.

11. The method as claimed in claim 10, wherein the first substrate is a translucent substrate.

12. The method as claimed in claim 11, wherein each of the devices is a semiconductor device including a nitride semiconductor and the light irradiation is performed using a laser beam.

13. The method as claimed in claim 1, wherein at least a portion of the devices are selected from the group consisting of a light emitting device, a liquid crystal device, a photoelectric transfer device, a piezoelectric device, a thin film transistor device, a thin film diode, a resistance device, a switching device, a micro-magnetic device, and a micro-optical device.

14. The method as claimed in claim 1, wherein the devices are produced on the first substrate.

15. The method as claimed in claim 1, wherein the step of holding the devices on the temporary holding member includes forming a wiring portion on each of the devices.

16. The method as claimed in claim 15, wherein the wiring portion comprises an electrode pad.

18. The image display unit as claimed in claim 17, wherein a ratio of the occupied area of each of the light emitting devices to an occupied area of a pixel on the image display unit ranges from about 10 to about 40,000.

19. The image display unit as claimed in claim 18, wherein the ratio ranges from about 10 to about 10,000.

20. The image display unit as claimed in claim 17, wherein the light emitting device is selected from the group consisting of a nitride semiconductor light emitting device, an arsenide semiconductor light emitting device, and a phosphide semiconductor light emitting device.

21. The image display unit as claimed in claim 17, wherein a pixel comprises a set of three of the light emitting devices, wherein each of the light emitting devices in the set has a different wavelength.

22. The image display unit as claimed in claim 17, wherein a current retention circuit is electrically connected to each of the light emitting devices for retaining a current flowing in each of the light emitting devices.

23. The image display unit as claimed in claim 22, wherein the current retention circuits are formed in a chip shape, and are mounted, together with each of the light emitting devices, on the wiring board.

24. The image display unit as claimed in claim 23, wherein each of the current retention circuits formed in the chip shape has a size substantially equal to a size of each of the light emitting devices.

26. The method as claimed in claim 25, the method further comprising the steps of:

stacking a semiconductor layer on a device forming substrate;

forming the light emitting devices on the semiconductor layer so as to be arrayed thereon;

separating each of the light emitting devices into individual chips; and

mounting the individual chips of each of the light emitting devices on the wiring board.

27. The method as claimed in claim 26, the method further comprising the steps of:

forming grooves reaching a front surface of the device forming substrate in a region adjacent to two of the light emitting devices so as to surround each of the light emitting devices;

separating each of the light emitting devices surrounded by the grooves from the device forming substrate; and

mounting each of the separated light emitting devices on the wiring board.

28. The method as claimed in claim 26, wherein the step of mounting each of the separated light emitting devices onto the wiring board includes positioning each of the separated light emitting devices such that at least one of a front surface and a back surface of each of the separated light emitting devices is attracted by an attracting mechanism.

29. The method as claimed in claim 26, wherein the step of separating each of the light emitting devices from the device forming substrate includes irradiating each of the light emitting devices with an energy beam from a back surface of the device forming substrate.

30. The method as claimed in claim 29, the method further comprising the steps of:

staging each of the light emitting devices on the device forming substrate between the device forming substrate and a temporary holding board before the step of separating each of the light emitting devices from the device forming substrate; and

staging each of the light emitting devices on the temporary holding board after the step of separating each of the light emitting devices from the device forming substrate.

31. The method as claimed in claim 30, wherein an adhesive is substantially formed on the temporary holding board, and a front surface of each of the light emitting devices is temporarily affixed to the adhesive.

32. The method as claimed in claim 26, wherein the step of mounting each of the separated light emitting devices on the wiring board includes pressing an electrode portion of the light emitting device into contact with a conductive material on the wiring board.

17. An image display unit, comprising:

an array of a plurality of light emitting devices each having an occupied area mounted on a wiring board for displaying an image in response to an image signal, wherein the occupied area ranges from about 25 μ

m² to about 10,000 μ

m².

25. A method of producing an image display unit having an array of a plurality of light emitting devices for displaying an image in response to an image signal, the method comprising the steps of:

preparing a wiring board on which wiring is provided in a matrix;

preparing the light emitting devices separated into individual chips, wherein an occupied area of each of the light emitting devices ranges from about 25 μ

m² to about 10,000 μ

m²; and

mounting the light emitting devices on the wiring board so as to connect the light emitting devices to the wiring.

33. A method of producing light emitting devices, the method comprising the steps of:

applying a semiconductor layer onto a substrate;

forming an array of a plurality of light emitting devices on the semiconductor layer;

separating the array of light emitting devices into individual light emitting devices; and

separating each of the light emitting devices from the substrate.

34. The method as claimed in claim 33, wherein the step of separating each of the light emitting devices from the substrate includes irradiating each of the light emitting devices with an energy beam from a back surface of the substrate.

35. The method as claimed in claim 34, the method further comprising the steps of:

staging each of the light emitting devices on the substrate between the substrate and a temporary holding board before the step of separating each of the light emitting devices from the substrate; and

staging each of the light emitting devices on the temporary holding board after the step of separating each of the light emitting devices from the substrate.

36. The method as claimed in claim 35, wherein an adhesive material is substantially formed on the temporary holding board, and a front surface of each of the light emitting devices is temporarily affixed to the adhesive.

38. The method as claimed in claim 37, wherein the devices comprise at least one of a light emitting device and a liquid crystal control device.

39. The method as claimed in claim 37, wherein a pixel comprises a set of at least a portion of the devices which each correspond to a different wavelength.

40. The method as claimed in claim 37, wherein the step of staging the devices on the temporary holding member includes forming an electrode pad on each of the devices, and wherein the step of forming wiring to each of the devices includes forming wiring to the electrode pad.

37. A method of producing an image display unit on which devices are arrayed in a matrix, the method comprising the steps of:

transferring the devices arrayed on a first substrate each having a first pitch to a temporary holding member such that the devices are spaced from each other with a second pitch that is larger than the first pitch of the devices arrayed on the first substrate;

staging the devices on the temporary holding member;

transferring the devices to a second substrate such that the devices are spaced from each other with a third pitch that is larger than the second pitch; and

forming wiring to be connected to each of the devices.

41. An image display unit comprising:

a wiring board and a plurality of light emitting devices mounted on the wiring board along a principal plane of the wiring board, wherein the light emitting devices include a crystal growth layer formed during crystal growth in an inverted direction that is perpendicular to the principal plane.

42. The image display unit as claimed in claim 41, wherein a portion of the crystal growth layer is formed from a substrate via a window portion, and wherein the light emitting device is separated from the substrate before being mounted on the wiring board.

43. The image display unit as claimed in claim 42, further comprising:

a first conductive layer, an active layer, and a second conductive layer formed on the crystal growth which has a crystal plane that is inclined with respect to a principal plane of the substrate; and

a first electrode connectable to the first conductive layer and a second electrode connectable to the second conductive layer, wherein a height of the first electrode is substantially equal to a height of the second electrode.

44. The image display unit as claimed in claim 42, further comprising:

a first conductive layer, an active layer, and a second conductive layer formed on the crystal growth layer which has a crystal plane that is inclined with respect to a principal plane of the substrate; and

a first electrode connectable to the first conductive layer and a second electrode connectable to the second conductive layer, wherein the crystal growth layer is positioned between the first electrode and the second electrode in a direction perpendicular with respect to a principal plane of the substrate.

45. The image display unit as claimed in claim 41, wherein the crystal growth layer comprises a nitride semiconductor composed of wurtzite formed by selective crystal growth.

46. The image display unit as claimed in claim 41, wherein the crystal growth layer is formed by selective growth into at least one of a hexagonal pyramid shape and a hexagonal trapezoid shape.

48. The method as claimed in claim 47, wherein a connecting portion is connected to at least one of the first and second electrodes such that the heights of the first and second electrodes are substantially equal.

49. The method as claimed in claim 47, wherein the step of mounting the crystal growth layer on the wiring board includes mounting the light emitting device on the wiring board such that at least one of a front surface and a back surface of the light emitting device is attracted by an attracting mechanism.

50. The method as claimed in claim 47, wherein the step of separating the crystal growth layer from the substrate includes irradiating the light emitting device with an energy beam from a back surface of the substrate.

51. The method as claimed in claim 50, wherein the irradiating with the energy beam is selectively performed.

52. The method as claimed in claim 50, the method further comprising the steps of:

holding the light emitting device between the substrate and a board for transfer before the step of separating the crystal growth layer from the substrate; and

holding the light emitting device on the board for transfer after the step of separating the crystal growth layer from the substrate.

47. A method of producing an image display unit, the method comprising the steps of:

producing a light emitting device on a substrate by selective growth of a crystal growth layer via an opening on the substrate;

forming a first conductive layer, an active layer, and a second conductive layer on the crystal growth layer;

forming a first electrode connected to the first conductive layer and a second electrode connected to the second conductive layer such that a height of the first electrode is substantially equal to a height of the second electrode;

separating the crystal growth layer from the substrate; and

mounting the crystal growth layer on a wiring board in a position that is inverted with respect to a position of the crystal growth layer on the substrate.

53. A device mounting board comprising:

a wiring board and a plurality of devices attached to the wiring board along a principal plane of the wiring board, wherein the devices include a crystal growth layer formed during crystal growth in an inverted direction with respect to crystal growth that is perpendicular to the principal plane.

54. The device mounting board as claimed in claim 53, wherein each of the crystal growth layers includes a portion extending along a substantially flat surface plane such that each portion has a substantially identical height relative to a surface of the wiring board upon which the devices are mounted.