Methods and systems for using names in virtual networks

• US 20020099937A1
• Filed: 04/11/2001
• Published: 07/25/2002
• Est. Priority Date: 04/12/2000
• Status: Active Grant

• Current Assignee: Oracle Systems Corporation (Oracle Corporation)
• Original Assignee: Corente, Inc. (Oracle Corporation)
• Inventors: Tuomenoksa, Mark
• Granted Patent: US 7,028,334 B2
• Time in Patent Office: Days
• US Class Current: 713/153
• CPC Class Codes: H04L 12/4641 Virtual LANs, VLANs, e.g. virtual private networks [VPN] LAN interconnection over a bridge based backbone H04L12/462; encapsulation techniques H04L12/4633; routing of packets H04L45/00; packet switches H04L49/00; virtual private networks for security H04L63/0272
• CPC Class Codes: H04L 41/0806 for initial configuration or provisioning, e.g. plug-and-play
• CPC Class Codes: H04L 41/0897 by horizontal or vertical scaling of resources, or by migrating entities, e.g. virtual resources or entities
• CPC Class Codes: H04L 41/5012 determining service availability, e.g. which services are available at a certain point in time
• CPC Class Codes: H04L 41/5032 Generating service level reports
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 43/045 for graphical visualisation of monitoring data
• CPC Class Codes: H04L 43/06 Generation of reports
• CPC Class Codes: H04L 43/062 related to network traffic
• CPC Class Codes: H04L 43/065 related to network devices
• CPC Class Codes: H04L 43/067 using time frame reporting
• CPC Class Codes: H04L 43/0811 by checking connectivity
• CPC Class Codes: H04L 43/0817 by checking functioning
• CPC Class Codes: H04L 43/0864 Round trip delays
• CPC Class Codes: H04L 43/0882 Utilisation of link capacity
• CPC Class Codes: H04L 43/0888 Throughput
• CPC Class Codes: H04L 43/16 Threshold monitoring
• CPC Class Codes: H04L 61/00 Network arrangements, protocols or services for addressing or naming
• CPC Class Codes: H04L 63/0272 Virtual private networks
• CPC Class Codes: H04L 63/029 Firewall traversal, e.g. tunnelling or, creating pinholes
• CPC Class Codes: H04L 63/083 : using passwords cryptographic mechanisms or cryptographic arrangements for entity authentication using a predetermined code H04L9/3226
• CPC Class Codes: H04L 63/101 : Access control lists [ACL]
• CPC Class Codes: H04L 63/1416 : Event detection, e.g. attack signature detection
• CPC Class Codes: H04L 63/164 : at the network layer
• CPC Class Codes: H04L 63/166 : at the transport layer
• CPC Class Codes: H04L 63/168 : above the transport layer
• CPC Class Codes: H04L 63/20 : for managing network security; network security policies in general filtering policies H04L63/0227
• CPC Class Codes: H04L 69/329 : in the application layer [OSI layer 7]
• CPC Class Codes: H04L 9/40 : Network security protocols

Abstract

Methods and systems are provided for enabling a network between a first and a second processor using at least one additional processor separate from the first and the second processors. In one embodiment, the additional processor may receive on behalf of the first processor information that includes the name of the second processor and receives on behalf of the second processor in that includes the name of the first processor. The additional processor may determine a first virtual address for the first processor based on the received name of the first processor and a second virtual address for the second processor based on the received name of the second processor such that the first and second virtual addresses uniquely identify the first and second processors, respectively, and are routable through the network. The additional processor may provide to each of the first and second processors the first and second virtual addresses to enable one or more tunnels between the first and the second processors.

Claims

1. A method for enabling a network between a first processor and a second processor using at least one additional processor separate from the first processor and the second processor, wherein the first processor and the second processor are each identifiable by a name, the method comprising the steps of:

receiving, at the at least one additional processor, on behalf of the first processor, information that includes the name of the second processor;

receiving, at the at least one additional processor, on behalf of the second processor, information that includes the name of the first processor;

determining a first virtual address for the first processor based on the information received on behalf of the second processor and a second virtual address for the second processor based on the information received on behalf of the first processor, such that the first and second virtual addresses uniquely identify the first and second processors, respectively, and are routable through the network; and

providing, by the at least one additional processor, to the first processor the second virtual address and to the second processor the first virtual address to enable one or more tunnels between the first and the second processors.

2. The method of claim 1, further comprising the step of:

establishing, by the first processor, one or more tunnels from the first processor to the second processor using the first and second virtual addresses.

3. The method of claim 2, wherein the step of establishing, by the first processor, one or more tunnels from the first processor to the second processor, comprises the step of:

establishing, by the first processor, one or more tunnels through a base network from the first processor to the second processor using the first and second virtual addresses.

4. The method of claim 3, wherein the step of establishing, by the first processor, one or more tunnels through a base network from the first processor to the second processor, includes the step of:

establishing, by the first processor, one or more tunnels through a base network from the first processor to the second processor using the first and second virtual addresses.

5. The method of claim 1, wherein each of the names includes a first portion and a second portion.

6. The method of claim 1, further comprising the steps of:

establishing a tunnel between the first processor and the at least one additional processor to communicate information between the first processor and the at least one additional processor.

7. The method of claim 6, wherein in the step of receiving, at the at least one additional processor, information on behalf of the first processor, comprises the step of:

receiving, at the at least one additional processor, the information on behalf of the first processor through the tunnel established between the first processor and the at least one additional processor.

8. The method of claim 1, further comprising the steps of:

determining, based on the information received on behalf of the second processor, information about a firewall that selectively restricts a flow of information into the first processor; and

providing, by the at least one additional processor, to the firewall the determined information such that information flowing from the second processor to the first processor on the enabled one or more tunnels is allowed by the firewall into the first processor.

9. The method of claim 1, further comprising the steps of:

determining information about a first local network connected to the first processor based on the information received on behalf of the second processor and information about a second local network connected to the second processor based on the information received on behalf of the first processor, wherein each local network includes one or more other processors separate from the at least one additional processor;

providing by the at least one additional processor to the first processor the information regarding the local network connected to the second processor and to the second processor the information regarding the local network connected to the first processor;

establishing, by the first processor, one or more tunnels from the first processor to the second processor using the first and second virtual addresses; and

enabling communications between the one or more other processors in the first local network and the one or more other processors in the second local network using the information about the first and second local networks.

10. The method of claim 1, further comprising the steps of:

determining information about a first local interface for the first processor based on the information received on behalf of the second processor and information about a second local interface for the second processor based on the information received on behalf of the first processor;

providing by the at least one additional processor to the first processor the information about the second local interface for the second processor and to the second processor the information about the first local interface for the first processor; and

establishing, by the first processor, one or more tunnels from the first processor to the second processor using the first and second virtual addresses and the information about the first and second local interfaces.

11. The method of claim 1, further comprising the steps of:

determining cryptographic information for the first processor based on the information received on behalf of the second processor and cryptographic information for the second processor based on the information received on behalf of the first processor;

providing by the at least one additional processor to the first processor the cryptographic information for the second processor and to the second processor the cryptographic information for the first processor; and

establishing, by the first processor, one or more tunnels from the first processor to the second processor using the first and second virtual addresses and the cryptographic information for the first and second processors.

13. The system of claim 12, wherein each of the names includes a first portion and a second portion.

14. The system of claim 12, further comprising:

means for establishing a tunnel between the first processor and the system to communicate information between the first processor and the system.

12. A system for enabling a network between a first processor and a second processor each identifiable by a name, the system comprising:

means for receiving on behalf of the first processor, information that includes the name of the second processor;

means for receiving on behalf of the second processor, information that includes the name of the first processor;

means for determining a first virtual address for the first processor based on the information received on behalf of the second processor and a second virtual address for the second processor based on the information received on behalf of the first processor, such that the first and second virtual addresses uniquely identify the first and second processors, respectively, and are routable through the network; and

means for providing to the first processor the second virtual address and to the second processor the first virtual address to enable one or more tunnels between the first and the second processors.

15. A system for enabling a network between a first processor and a second processor, wherein the first and second processors are separate from said system and are each identifiable by a name, said system comprising:

a tunneling interface that receives, on behalf of the first processor, information that includes a name of the second processor, and receives, on behalf of the second processor, information that includes the name of the first processor; and

a controller that determines a first virtual address for the first processor based on the information received on behalf of the second processor and a second virtual address for the second processor based on the information received on behalf of the first processor such that the first and second virtual addresses uniquely identify the first and second processors, respectively, and are routable through the network, and provides to each of the first and second processors the first and second virtual addresses to enable one or more tunnels between the first and the second processors.