Low inductance chip with center via contact
First Claim
1. A multi-layer ceramic capacitive device comprising:
- a plurality of first electrode plates with a via centrally located therein, said via having a first diameter, wherein said first electrode plates have a circular opening having a second diameter therein and wherein said circular opening surrounds said via;
a plurality of second electrode plates with a via centrally located therein, said via having said first diameter, wherein said second electrode plates have a perimeter region of said plates removed and wherein said pluralities of first and second electrode plates are interleaved to form a capacitive stack;
a first terminal surrounding the perimeter of the capacitive stack and in electrically connection with each of said plurality of first electrode plates; and
a second terminal in said via and in electrical connection with each of said plurality of second electrode plates.
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Accused Products
Abstract
A multi-layer ceramic capacitor (MLC) device for low inductance decoupling applications is provided in which a first terminal is formed around substantially the entire periphery of the device body and a second opposing polarity terminal is formed by a through-via located generally in the middle of the device body. In an alternative embodiment, a plurality of surface mount MLC devices are mounted to a circuit board in a diamond arrangement so as to allow contacts of one polarity to be electrically connected to terminals of similar polarity which are located substantially around the entire periphery of each device body. Contacts of opposing polarity may be electrically connected to through-via terminals located generally in the middle of each device body. In a third embodiment, a single surface mount MLC device is provided in which all electrical connections between the circuit board and the device are made by through-via terminals which align with respective contacts on the circuit board.
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Citations
7 Claims
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1. A multi-layer ceramic capacitive device comprising:
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a plurality of first electrode plates with a via centrally located therein, said via having a first diameter, wherein said first electrode plates have a circular opening having a second diameter therein and wherein said circular opening surrounds said via;
a plurality of second electrode plates with a via centrally located therein, said via having said first diameter, wherein said second electrode plates have a perimeter region of said plates removed and wherein said pluralities of first and second electrode plates are interleaved to form a capacitive stack;
a first terminal surrounding the perimeter of the capacitive stack and in electrically connection with each of said plurality of first electrode plates; and
a second terminal in said via and in electrical connection with each of said plurality of second electrode plates. - View Dependent Claims (2, 3, 4)
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5. An multi-layer ceramic capacitive array mounted to a circuit board having a plurality of contacts in a plurality of rows, said plurality of contacts within each of said plurality of rows having an alternating pattern of polarity, said array comprising:
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a plurality of multi-layer ceramic capacitive devices wherein each of said devices have a first terminal surrounding the perimeter of said capacitive device and in electrically connection with each of a plurality of first electrode plates and a second terminal centrally located in said capacitive device in a through-via and in electrical connection with each of a plurality of second electrode plates, said first and second electrode plates being interleaved to form said capacitive device;
wherein said plurality of capacitive devices are mounted to said circuit board in a diamond arrangement such that said first terminal is in electrical connection with four of said plurality of contacts, one each at the corners of the device and wherein said second terminal is in electrical connection with one of said plurality of contacts of an opposing polarity.
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6. An multi-layer ceramic capacitive device mounted to a circuit board having a plurality of contacts in a plurality of rows, said plurality of contacts within each of said plurality of rows having an alternating pattern of polarity, said device comprising:
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a plurality of first electrode plates with a plurality of via located therein;
a plurality of second electrode plates with a plurality of via located therein, said pluralities of first and second electrode plates interleaved to form said capacitive device wherein said plurality of via in said first electrode plates, said plurality of via in said second electrode plates and said plurality of contacts on said circuit board are aligned;
a plurality of first terminals corresponding to alternating ones of said plurality of contacts in each of said plurality of rows such that all of said first terminals have the same polarity; and
a plurality of second terminals corresponding to alternating ones of said plurality of contacts in each of said plurality of rows such that all of said second terminals have the same polarity which opposes the polarity of said first terminals. - View Dependent Claims (7)
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Specification