High frequency pulse width modulation driver, particularly useful for electrostatically actuated MEMS array

• US 20020101769A1
• Filed: 06/19/2001
• Published: 08/01/2002
• Est. Priority Date: 01/26/2001
• Status: Active Grant

• Current Assignee: Lumentum Operations, LLC (Lumentum Holdings Inc.)
• Original Assignee: Movaz Networks, Inc. (ADTRAN Holdings, Inc.)
• Inventors: Nagy, Michael L., Garverick, Steven L.
• Granted Patent: US 6,543,286 B2
• Time in Patent Office: Days
• US Class Current: 365/200
• CPC Class Codes: G02B 2006/12104 Mirror; Reflectors or the like
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means
• CPC Class Codes: G02B 6/266 the optical element being an attenuator
• CPC Class Codes: G02B 6/3512 the optical element being reflective, e.g. mirror
• CPC Class Codes: G02B 6/3518 the reflective optical element being an intrinsic part of a MEMS device, i.e. fabricated together with the MEMS device MEMS devices in general B81B; manufacture of MEM devices in general B81C; micromechanical devices controlling the direction of light G02B26/0833
• CPC Class Codes: G02B 6/3556 NxM switch, i.e. regular arrays of switches elements of matrix type constellation
• CPC Class Codes: G02B 6/356 in an optical cross-connect device, e.g. routing and switching aspects of interconnecting different paths propagating different wavelengths to (re)configure the various input and output links switching polarized beams G02B6/3594; power equalizers G02B6/356 and G02B6/3594; path selecting means H04Q11/0001
• CPC Class Codes: G02B 6/357 Electrostatic force electrostatic forces controlling reflecting elements in general G02B26/0841
• CPC Class Codes: H04Q 11/0005 Switch and router aspects
• CPC Class Codes: H04Q 2011/0022 using fibre gratings
• CPC Class Codes: H04Q 2011/0024 using space switching
• CPC Class Codes: H04Q 2011/003 using switches based on microelectro-mechanical systems [MEMS]
• CPC Class Codes: H04Q 2011/0039 Electrical control
• CPC Class Codes: H04Q 2011/0049 Crosstalk reduction; Noise; Power budget

Abstract

Pulse-width modulation (PWM) drive circuitry particularly applicable to an array of electrostatic actuators formed in a micro electromechanical system (MEMS), such as used for optical switching. A control cell associated with each actuator includes a register selectively stored with a desired pulse width. A clocked counter distributes its outputs to all control cells. When the counter matches the register, a polarity signal corresponding to a drive clock is latched and controls the voltage applied to the electrostatic cell. In a bipolar drive, one actuator electrode is driven by a drive clock; the other, by the latch. The MEMS element may be a tiltable plate supported in its middle by a torsion beam. Complementary binary signals may drive two capacitors formed across the axis of the beam. The register and comparison logic for each cell may be formed by a content addressable memory.

Claims

1. A method of controlling an electrostatic actuator including a first variable gap capacitor including first and second electrodes attached respectively to first and second mechanical elements movable relatively to each other, comprising:

selecting a delay producing a relative position between said two mechanical elements;

applying to said first electrode a first drive signal having a drive frequency; and

applying to said second electrode a second drive signal having said first frequency but delayed from said first bipolar drive signal by said delay.

2. The method of claim 1, wherein said drive frequency is greater than a mechanical resonance of a movement of said mechanical elements with respect to each other.

3. The method of claim 1, wherein said drive frequency is greater than 50 kHz.

4. The method of claim 1:

wherein said first mechanical element is supported by a torsion beam and said first electrode is fixed to said first mechanical element on opposed first and second sides of said torsion beam and said second electrode is opposed to said first electrode on a first side of said torsion beam; and

,

wherein said electrostatic actuator further includes a second variable gap capacitor formed between a third electrode formed on said second mechanical element in opposition to said first electrode on said second side of said torsion.

5. The method of claim 4, further comprising applying to said third electrode a third drive signal complementary to said second drive signal.

6. The method of claim 5, further comprising;

selecting in a first time period one of said second and third electrodes and selecting in a second time period the other of said second and third electrodes;

applying to said selected electrode said second drive signal; and

applying to the one of said second and third electrodes that was not selected said first drive signal.

7. The method of claim 1, wherein each of said drive signals has a first component of a first voltage and a second component of a second voltage.

8. The method of claim 7, wherein each of said first and second components have substantially equal duration.

9. The method of claim 7, wherein said first and second voltages differ by at least 40V.

10. A method of controlling an electrostatic actuator including a first variable gap capacitor including first and second electrodes attached respectively to first and second mechanical elements movable relatively to each other, comprising:

selecting a duty cycle producing a relative position between said two mechanical elements; and

applying between said electrodes a bipolar drive signal having said duty cycle.

11. The method of claim 10, wherein said bipolar drive signal has a substantially zero DC component.

13. The system of claim 12, wherein said first means for applying comprises:

second means for determining a delay from said duty cycle; and

second means for applying to said first electrode a first binary signal having a repetition period and for applying a second binary signal having said repetition period and delayed from said first binary signal by said delay.

14. The system of claim 13:

further comprising a third electrode positioned on said second mechanical element in opposition to a portion of said first electrode; and

wherein said second means for applying additionally applies to said third electrode a third binary signal complementary to said second binary signal.

15. The system of claim 14, wherein said second and third electrodes are opposed to portions of said first electrode on opposed sides of a torsion beam supporting said first mechanical element.

17. The system of claim 16, further comprising a source of clock signal at a control frequency and wherein said counter receives said clock signal.

18. The system of claim 16, wherein said repetitive signal repeats on an asynchronous basis so that an output of said counter is non-linear with time.

19. The system of claim 16, wherein all of said registers receive multiple data lines and said register is triggered to store delay values on said multiple data lines as said delay value by a load signal dedicated to a respective one of said control circuits.

20. The system of claim 19, further comprising:

a controller controlling system and outputting values for said multiple data lines and further outputting a multi-bit address signal identifying any selected of said control circuits; and

an address decoder receiving said multi-bit address signal and having multiple outputs corresponding to respective ones of said load signals for said plurality of said control circuits.

21. The system of claim 16, wherein said register, comparator, and latch are included in a low-voltage digital circuit section powered by a low-voltage power bus conveying a low voltage and wherein each of said control circuits further comprises a high-voltage digital circuit section power by a high-voltage power bus conveying a high voltage at least four times said low voltage and including a gate circuit controlled by said delayed drive signal and controllably impressing said high voltage on said second electrode.

22. The system of claim 21, wherein said plurality of actuators are implemented as a micro electromechanical system in one level of a bonded structure and wherein said high-voltage digital circuits are implemented in an integrated circuit in a second level of said bonded structure, the corresponding actuators and high-voltage digital circuits being vertically aligned in said bonded structure.

23. The system of claim 22, wherein said low-voltage digital circuits are implemented in an area of said integrated circuits offset to a side of an area of said high-voltage digital circuits.

24. The system of claim 16, wherein said register and comparator are commonly implemented as a content addressable memory.

26. The array of claim 25, wherein each of said plates has a mirror surface formed on a top surface of said bonded structure.

27. The array of claim 25, further comprising a counter driven at a multiple of said drive frequency and connected to all of said drive cells and wherein said array includes a plurality of control cells associated with respective ones of said drive cells kand including:

a register storing a delay value; and

a comparator comparing an output of said counter with said stored delay value and triggering said first drive signal upon a true comparison.

28. The array of claim 27:

wherein said array is a two dimensional array;

wherein each said drive cell is powered by a high-voltage bus supplying a high voltage bus and is arranged vertically below its corresponding plate in said bonded structure with said pitch; and

wherein said control cells are powered by a low-voltage bus supplying a low voltage no more than 25% of said high voltage.

29. The array of claim 25, wherein said multiple is at least 64.

12. An actuator and control system, comprising:

an electrostatic actuator comprising a first electrode fixed on a first mechanical element and a second electrode fixed in opposition to said first electrode on a second mechanical element which is movable with respect to said first mechanical element;

first means for determining a duty cycle of a bipolar electrostatic signal to be applied between said two electrodes to achieve a desired separation of said two mechanical elements; and

first means for applying between said two electrodes said bipolar electrostatic signal having said duty cycle.

16. A system including an array of electrostatic actuators, comprising:

a plurality of electrostatic actuators arranged in an array and each including a first mechanical element with an affixed first electrode and a second mechanical element with an affixed second electrode, said two mechanical elements being movable with respect to each other;

a counter driven by a repetitive trigger signal;

an amplifier receiving a high-order bit of said counter and creating a first drive signal applied to all of said first electrodes; and

a plurality of control circuits associated with respective ones of said actuators and each including

a register storing a delay value,

a comparator comparing said stored delay value with lower-order bits of said counter, and

a latch triggered by an output of said comparator latching said high-order bit of said counter to produce a delayed drive signal, said second electrode of the associated one of said actuators being driven according to delayed drive signal.

25. An array of electrostatically tiltable plates, comprising:

a plurality of tiltable plates formed as an array having a pitch in first layer of a bonded structure, said first layer comprising silicon and silicon oxide layers, each plate being twistably supported by and having approximately equal first and second areas separated by an axis of a torsion beam;

a second layer of said bonded structure including for each of said plates a first electrode and a second electrode in respective opposition to said first and second areas of said mirror plate, respective variable gap capacitors being formed between said first and second electrodes and said mirror plate;

a source of a binary square wave common node signal having a drive frequency connected to all of said mirror plates; and

a plurality of drive cells associated respectively with each of said plates, each drive cell supplying to its first electrode a respective binary square wave first drive signal having said drive frequency and delayed by a respective delay from said common node signal and supplying to its second electrode a respective binary square wave second drive signal complementary to said first drive signal.

30. A content addressable arrayed control system, comprising a plurality of control cells each comprising a plurality of memory cells, each memory cell receiving a respective one of a plurality of data lines distributed to all of said control cells and a respective one of a plurality of timing lines distributed to all of said control cells, and a load line distributed only to one of the control cells of said plurality of control cells, each memory cell comprising:

a 1-bit latch triggered by said load line to latch a signal on said respective data line; and

a 1-bit comparator comparing an output of said latching circuit with a signal on said respective timing line and outputting a valid bit compare signal on an output line commonly connected to the comparators of all memory cell of said control cell, an address compare signal on said output line being valid only when all of said comparators of said control cell output valid bit compare signals.

31. The system of claim 30, wherein each control cell further includes an output latch latching in response to said output signal a state signal on a state line distributed to all output latches of said said plurality of control cells.

32. The system of claim 31, further comprising a counter driven by a clock signal having a high-order bit driving said state line and lower-order bits driving respective ones of said timing lines.

33. The system of claim 32, further comprising an address decoder receiving a multi-bit address signal and enabling in response thereto only one of said load lines.

34. The system of claim 32, wherein count intervals of said counter are non-uniform in duration.

36. The control section of claim 35, wherein said trigger signal is synchronous with a clock signal.

37. The control section of claim 35, wherein said trigger signal is aperiodic.

38. The control section of claim 35, wherein said registers and counters are arranged in rows and columns and wherein seach of registers is controlled by a row enable signal, a column enable signal, and a load signal.

40. The element of claim 39, wherein said second periodic signal is applied to said second electrode and further comprising a third electrical drive applying a third periodic signal to said third electrode that is complementary to said second periodic signal.

41. The element of claim 39, further comprising at least one switching element to switch said second periodic signal to a selected one of said second and third electrodes and to switch said first periodic to the other of said second and third electrodes.

42. The element of claim 39, wherein said element and said electrodes are incorporated in a micro electromechanical system.

43. The element of claim 42, wherein said second electrical drive is incorporated in an integrated circuit bonded to said micro electromechanical system.

35. A content addressable control section for controlling N time delays supplied to a plurality N of drive sections, comprising:

a multi-bit data bus;

N registers seletively connected in parallel to said data bus;

at least one control line connected to said N registers to reset said registers according to data on said data bus; and

a single clocked counter connected to respective ones of said registers and providing an output in comparision to said connected registers.

39. An electrostatically actuated element, comprising:

a mechanical element tiltable about an axis and including a first electrode extending across said axis;

second and third electrodes in opposition to portions of said first electrode on opposed sides of said axis;

a first electrical drive applying a first periodic signal to said first electrode;

a second electrical drive applying a second periodic signal to one of said second and third electrodes that is phase shifted from said first periodic signal by a controllable phase shift; and

a controller setting a value of said controllable phase shift to control a degree of tilting of said mechanical element.