On-chip transformers
First Claim
1. A structure in a semiconductor chip, said structure comprising:
- a dielectric area having a first permeability;
a permeability conversion material having a second permeability, said permeability conversion material being interspersed within said dielectric area, wherein said second permeability is greater than said first permeability;
a first conductor patterned into said dielectric area, said first conductor having a first plurality of turns;
a second conductor patterned into said dielectric area, said second conductor having a second plurality of turns.
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Accused Products
Abstract
In an exemplary embodiment of the disclosed transformer, the transformer comprises a dielectric area. For example, the dielectric area can consist of three different dielectric layers. Also, by way of example, the dielectric area can comprise silicon dioxide or a low-k dielectric. According to the exemplary embodiment, the dielectric area is interspersed with a permeability conversion material. The permeability conversion material has a permeability higher than the permeability of the dielectric area. For example, the permeability conversion material can be nickel, iron, nickel-iron alloy, or magnetic oxide. The exemplary embodiment further comprises a first conductor and also a second conductor patterned into the dielectric area. The first and/or the second conductor can comprise copper, aluminum, or a copper-aluminum alloy. Each of the first and second conductors are made up of a number of turns which result in, respectively, the primary and secondary windings of the exemplary disclosed transformer.
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Citations
40 Claims
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1. A structure in a semiconductor chip, said structure comprising:
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a dielectric area having a first permeability;
a permeability conversion material having a second permeability, said permeability conversion material being interspersed within said dielectric area, wherein said second permeability is greater than said first permeability;
a first conductor patterned into said dielectric area, said first conductor having a first plurality of turns;
a second conductor patterned into said dielectric area, said second conductor having a second plurality of turns. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A structure in a semiconductor chip, said structure comprising:
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a first dielectric layer;
a second dielectric layer situated over said first dielectric layer, said second dielectric layer being interspersed with a permeability conversion material;
a third dielectric layer situated over said second dielectric layer;
a primary winding patterned into said first, second, and third dielectric layers;
a second winding patterned into said first, second, and third dielectric layer. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method comprising steps of:
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patterning into a first dielectric layer a first plurality of interconnect metal segments in a first conductor and a first plurality of interconnect metal segments in a second conductor;
increasing a permeability of said first dielectric layer by interspersing a permeability conversion material into said first dielectric layer;
fabricating a first plurality and a second plurality of via metal segments in a second dielectric layer;
patterning into a third dielectric layer a second plurality of interconnect metal segments in said first conductor and a second plurality of interconnect metal segments in said second conductor, wherein said first plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said first conductor and wherein said second plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said second conductor. - View Dependent Claims (21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 35, 36, 37, 38, 39, 40)
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27. A method comprising steps of:
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patterning into a first dielectric layer a first plurality of interconnect metal segments in a first conductor and a first plurality of interconnect metal segments in a second conductor;
fabricating a first plurality and a second plurality of via metal segments in a second dielectric layer;
increasing a permeability of said second dielectric layer by interspersing a permeability conversion material into said second dielectric layer;
patterning into a third dielectric layer a second plurality of interconnect metal segments in said first conductor and a second plurality of interconnect metal segments in said second conductor, wherein said first plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said first conductor and wherein said second plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said second conductor.
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34. A method comprising steps of:
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patterning into a first dielectric layer a first plurality of interconnect metal segments in a first conductor and a first plurality of interconnect metal segments in a second conductor;
fabricating a first plurality and a second plurality of via metal segments in a second dielectric layer;
patterning into a third dielectric layer a second plurality of interconnect metal segments in said first conductor and a second plurality of interconnect metal segments in said second conductor, wherein said first plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said first conductor and wherein said second plurality of via metal segments interconnect said first and second plurality of interconnect metal segments in said second conductor;
increasing a permeability of said third dielectric layer by interspersing a permeability conversion material into said third dielectric layer.
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Specification