Reception synchronization apparatus and demodulating apparatus using the same
First Claim
1. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period, from an OFDM signal each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:
- a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a frame guard removing circuit that receives a signal outputted from the calculation circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;
an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another; and
a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position.
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Accused Products
Abstract
A reception synchronization apparatus is capable of achieving precise synchronization of an OFDM signal including a frame guard added to the OFDM signal. A demodulating apparatus can be realized using such a reception synchronization apparatus. The reception synchronization apparatus includes a multiplier for calculating the correlation between a received OFDM signal and an OFDM signal delayed by a delay circuit; a moving integration circuit for adding a signal outputted from the multiplier over an entire guard period; n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which respectively receive a signal outputted from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal; n interval integrator for cumulatively adding signals outputted from the frame guard removing circuits, for segments of the signal each having an interval equal to the time slot period; and a detection circuit for detecting a maximum peak from the results outputted from the n interval integrators and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, at which an effective symbol period should be extracted.
28 Citations
28 Claims
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1. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period, from an OFDM signal each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:
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a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a frame guard removing circuit that receives a signal outputted from the calculation circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;
an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another; and
a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position. - View Dependent Claims (2, 3, 4, 5)
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6. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period, from an OFDM signal each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:
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a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;
a frame guard removing circuit that receives a signal outputted from the moving integration circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;
an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another;
and a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position. - View Dependent Claims (7, 8, 9, 10)
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11. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period, from an OFDM signal each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:
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a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which receive a signal outputted from the calculation circuit, remove the frame guard period from the received signal, and output a resultant signal;
n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuit, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another; and
a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position. - View Dependent Claims (12, 13, 14, 15, 17, 18, 19, 20)
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16. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period, from an OFDM signal each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:
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a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;
n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which respectively receive a signal outputted from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal;
n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuit, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another; and
a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position.
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21. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:
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a timing controller for generating the synchronization timing signal and correcting the synchronization timing on the basis of a supplied offset compensation signal; and
a reception synchronization apparatus comprising a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a frame guard removing circuit that receives a signal outputted from the calculation circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;
an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another;
a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position; and
an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller. - View Dependent Claims (22, 24, 26, 28)
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23. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:
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a timing controller for generating the synchronization timing signal and correcting the synchronization timing on the basis of a supplied offset compensation signal; and
a reception synchronization apparatus comprising;
a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;
a frame guard removing circuit that receives a signal outputted from the moving integration circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;
an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another;
a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position; and
an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.
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25. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:
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a timing controller for generating the synchronization timing signal and correcting the synchronization timing on the basis of a supplied offset compensation signal; and
a reception synchronization apparatus comprising;
a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which receive a signal outputted from the calculation circuit, remove the frame guard period from the received signal, and output a resultant signal;
n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuit, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another;
a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position; and
an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.
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27. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:
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a timing controller for generating the synchronization timing signal and correcting the synchronization timing on the basis of a supplied offset compensation signal; and
a reception synchronization apparatus comprising;
a delay circuit for delaying a received OFDM signal by an effective symbol period;
a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;
a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;
n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which respectively receive a signal outputted from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal;
n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuit, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another;
a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position; and
an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.
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Specification