Multi-modem implementation with host based and digital signal processor based modems

• US 20020108001A1
• Filed: 01/31/2002
• Published: 08/08/2002
• Est. Priority Date: 09/25/1998
• Status: Active Grant

• Current Assignee: Amir Hindie, David Pearce, Jim Beaney, Karl Leinfelder, Karl Nordling, Sebastian Gracias, Wesley Smith
• Original Assignee: Amir Hindie, David Pearce, Jim Beaney, Karl Leinfelder, Karl Nordling, Sebastian Gracias, Wesley Smith
• Inventors: Pearce, David, Smith, Wesley, Leinfelder, Karl, Nordling, Karl, Beaney, Jim, Hindie, Amir, Gracias, Sebastian
• Granted Patent: US 6,708,235 B2
• Time in Patent Office: Days
• US Class Current: 710/22
• CPC Class Codes: H04L 27/0008 arrangements for allowing a transmitter or receiver to use more than one type of modulation negotiating modulation type for two-way transmission paths H04L5/1453
• CPC Class Codes: H04L 7/0029 interpolation of received data signal
• CPC Class Codes: H04L 7/0058 detection of error based on equalizer tap values
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors

Abstract

A plurality of modems or modem types can run on a host processor, a digital signal processor or both, either concurrently or selectively. Modules of more than one modem program can be swapped in and out of DSP memory space. Common modem code can be run on either a host processor or on a DSP using respective command libraries.

Claims

1. A computing device, comprising:

a. a bus;

b. a host processor connected to said bus for processing programs stored in memory;

c. a memory connected to said bus, said memory storing a plurality of modem programs;

d. a digital signal processor (DSP) connected to said bus, having a DSP memory space allocated to it, said DSP configured to receive and run modem programs from said memory in the DSP memory space; and

e. at least one codec connected to said bus for converting signals on an analog communication line into digital and digital signals into analog.

2. The computing device of claim 1 further comprising a DMA controller for managing transfers between said memory and said DSP memory.

3. The computing device of claim 2 in which said DMA controller can manage transfers of one or more modem programs from said memory to said DSP Memory.

4. The computing device of claim 3 in which more than one modem program is stored in said DSP memory space.

5. The computing device of claim 3 in which said memory contains more than one modem program for execution by said host processor.

6. The computing device of claim 2 in which at least one of said modem programs is comprised of modules, and said DMA controller can manage swapping said modules to or from the DSP memory space.

7. The computing device of claim 5 in which modules from two or more modem programs are loaded in said DSP memory for execution.

8. The computing device of claim 1 in which said memory contains more than one modem program for execution by the host processor.

9. The computing device of claim 1 in which said memory contains more than one modem program for execution by the host and said DSP memory contains more than one modem program for execution by said DSP.

10. The computing device of claim 1 in which said DSP memory space includes an area storing a command library.

11. The computing device of claim 7 in which said command library contains a symbol based command set.

12. The computing device of claim 11 in which each command in said command set triggers instructions in the native language of the DSP.

13. The computing device of claim 1 in which said memory includes an area storing a command library.

14. The computing device of claim 12 in which said command library contains a symbol based command set.

15. The computing device of claim 14 in which each command in said command set triggers instructions in the native language of the host processor.

17. The method of claim 16 in which said first modem program and said second modem program run concurrently.

19. The method of claim 18 further comprising the step of running at least one modem on the host processor.

20. The computing device of claim 16 in which said first modem program and said second modem program interact with respective codecs.

16. A method of implementing modem functionality, comprising the steps of:

running a first modem program on a host processor; and

running a second modem program on a digital signal processor.

18. A method of implementing modem functionality, comprising the step of running modules of two or more modem programs concurrently on a DSP.

21. A system comprising:

a. a communications device, which comprises;

a1. a bus;

a2. a memory connected to said bus, said memory storing a plurality of modem programs used to execute modem functionality;

a3. a digital signal processor connected to said bus, said digital signal processor having DSP memory; and

a4. a direct memory access controller connected to said memory and to said digital signal processor for swapping programs between said memory and said DSP memory,

b. a communications network; and

c. at least two communications lines connecting said communications device to said network.

22. The system of claim 21 in which one modem program can execute on the host concurrently with a second modem program executing on a DSP.

23. A computer program product, comprising:

a. a memory medium; and

b. a computer program stored on said memory medium, said computer program comprising instructions for running a first modem program on a host processor and for running a second modem program on a digital signal processor.

24. A computer program product, comprising:

a. a memory medium; and

b. a computer program stored on said memory medium, said computer program comprising instructions for running modules of two or more modem programs simultaneously on a DSP.

25. A computer program product, comprising:

a. a memory medium; and

b. a computer program stored on said memory medium, said computer program comprising instructions for selectively running modem programs from either a host processor or from a DSP.