Checkerboard buffer using memory blocks
First Claim
1. A checkerboard buffer, comprising:
- a data source, providing data in a first order;
a data destination, receiving data in a second order;
at least two memory devices, each memory device having a plurality of memory locations, where data is stored in parallel to the memory devices and retrieved in parallel from the memory devices, and where data is stored according to the first order using blocks of memory locations, each block having a number of memory locations equal to a power of 2;
a first data switch connected to the data source and each of the memory devices, where the first data switch controls which data is stored to which memory device; and
a second data switch connected to the data destination and each of the memory devices, where the second data switch controls providing data to the data destination according to the second order.
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Accused Products
Abstract
Methods and apparatus for storing and retrieving data in parallel but in different orders. In one implementation, data for pixels is stored according to a checkerboard pattern, alternately between two memory devices, forming a checkerboard buffer. In one implementation, a checkerboard buffer includes: a data source, providing data in a first order; a data destination, receiving data in a second order; at least two memory devices, each memory device having a plurality of memory locations, where data is stored in parallel to the memory devices and retrieved in parallel from the memory devices, and where data is stored according to the first order using blocks of memory locations, each block having a number of memory locations equal to a power of 2; a first data switch connected to the data source and each of the memory devices, where the first data switch controls which data is stored to which memory device; and a second data switch connected to the data destination and each of the memory devices, where the second data switch controls providing data to the data destination according to the second order.
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Citations
66 Claims
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1. A checkerboard buffer, comprising:
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a data source, providing data in a first order;
a data destination, receiving data in a second order;
at least two memory devices, each memory device having a plurality of memory locations, where data is stored in parallel to the memory devices and retrieved in parallel from the memory devices, and where data is stored according to the first order using blocks of memory locations, each block having a number of memory locations equal to a power of 2;
a first data switch connected to the data source and each of the memory devices, where the first data switch controls which data is stored to which memory device; and
a second data switch connected to the data destination and each of the memory devices, where the second data switch controls providing data to the data destination according to the second order. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A checkerboard buffer, comprising:
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a video source providing pixel data for pixels in a frame;
a video destination;
a first memory;
a second memory;
a first data bus connected to the first memory;
a second data bus connected to the second memory;
a first address multiplexor connected to the first memory;
a second address multiplexor connected to the second memory;
a source address bus connected to the video source, the first address multiplexor, and the second address multiplexor;
a first destination address bus connected to the video destination and the first address multiplexor;
a second destination address bus connected to the video destination and the second address multiplexor;
a first data switch connected to the first data bus, the second data bus, and the video source, where the first data switch is between the video source and the first memory and between the video source and the second memory, and where the first data switch switches which memory to store pixel data for two pixels with each horizontal row of pixels; and
a second data switch connected to the first data bus, the second data bus, and the video destination, where the second data switch is between the video destination and the first memory and between the video destination and the second memory, and where the second data switch switches the order pixel data from each of the first memory and the second memory is provided to the video destination with each vertical column of pixels;
where pixel data is stored in the first memory and the second memory according to horizontal rows of pixels in the frame, and pixel data is stored in blocks of memory locations, each block having a number of memory locations equal to a power of 2. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41)
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42. A method of storing pixel data in a checkerboard buffer, comprising:
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storing pixel data for a first pair of pixels at a first memory address in a first memory device and a second memory device respectively, where the first pair of pixels are the first two pixels in a first horizontal row of pixels in a frame; and
storing pixel data for a second pair of pixels at a second memory address in the second memory device and the first memory device respectively, where the second pair of pixels are the first two pixels in a second horizontal row of pixels in a frame and are vertically adjacent to the first pair of pixels;
where pixel data is stored in the first memory and the second memory according to horizontal rows of pixels in the frame, and pixel data is stored in blocks of memory locations, each block having a number of memory locations equal to a power of 2. - View Dependent Claims (43, 44, 45, 46, 48, 49, 50, 51, 52, 53)
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47. A method of retrieving pixel data in a checkerboard buffer, comprising:
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retrieving pixel data for a first pair of pixels from a first memory address in a first memory device and from a second memory address in a second memory device respectively, where the first pair of pixels are the first two pixels in a first vertical column of pixels in a frame; and
retrieving pixel data for a second pair of pixels from the first memory address in the second memory device and from the second memory address in the first memory device respectively, where the second pair of pixels are the first two pixels in a second vertical column of pixels in a frame and are horizontally adjacent to the first pair of pixels;
where pixel data is stored in the first memory and the second memory according to horizontal rows of pixels in the frame, and pixel data is stored in blocks of memory locations, each block having a number of memory locations equal to a power of 2.
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54. A method of storing pixel data and retrieving pixel data in a checkerboard buffer, comprising:
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storing pixel data for a first pixel and a second pixel at a first memory address in a first memory device and a second memory device respectively, where the first pixel and the second pixel are the first two pixels in a first horizontal row of pixels in a frame;
storing pixel data for a third pixel and a fourth pixel at a second memory address in the second memory device and the first memory device respectively, where the third pixel and the fourth pixel are the first two pixels in a second horizontal row of pixels in a frame, and the third pixel and the fourth pixel are vertically adjacent to the first pixel and the second pixel, respectively;
retrieving pixel data for the first pixel and the third pixel from the first memory address in the first memory device and from the second memory address in the second memory device respectively, where the first pixel and the third pixel are the first two pixels in a first vertical column of pixels in a frame; and
retrieving pixel data for the second pixel and the fourth pixel from the first memory address in the second memory device and from the second memory address in the first memory device respectively, where the second pixel and the fourth pixel are the first two pixels in a second vertical column of pixels in a frame and the second pixel and the fourth pixel are horizontally adjacent to the first pixel and the third pixel, respectively;
where pixel data is stored in the first memory and the second memory according to horizontal rows of pixels in the frame, and pixel data is stored in blocks of memory locations, each block having a number of memory locations equal to a power of 2. - View Dependent Claims (55, 56, 57, 58, 59, 60, 61, 62, 63, 64)
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65. A system for storing pixel data and retrieving pixel data in a checkerboard buffer, comprising:
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means for storing pixel data for a first pixel and a second pixel at a first memory address in a first memory device and a second memory device respectively, where the first pixel and the second pixel are the first two pixels in a first horizontal row of pixels in a frame;
means for storing pixel data for a third pixel and a fourth pixel at a second memory address in the second memory device and the first memory device respectively, where the third pixel and the fourth pixel are the first two pixels in a second horizontal row of pixels in a frame, and the third pixel and the fourth pixel are vertically adjacent to the first pixel and the second pixel, respectively;
means for retrieving pixel data for the first pixel and the third pixel from the first memory address in the first memory device and from the second memory address in the second memory device respectively, where the first pixel and the third pixel are the first two pixels in a first vertical column of pixels in a frame; and
means for retrieving pixel data for the second pixel and the fourth pixel from the first memory address in the second memory device and from the second memory address in the first memory device respectively, where the second pixel and the fourth pixel are the first two pixels in a second vertical column of pixels in a frame and the second pixel and the fourth pixel are horizontally adjacent to the first pixel and the third pixel, respectively;
where pixel data is stored in the first memory and the second memory according to horizontal rows of pixels in the frame, and pixel data is stored in blocks of memory locations, each block having a number of memory locations equal to a power of 2.
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66. A method of storing data and retrieving data in a checkerboard buffer, comprising:
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storing a first data element and a second data element at a first memory address in a first memory device and a second memory device respectively;
storing a third data element and a fourth data element at a second memory address in the second memory device and the first memory device respectively;
retrieving the first data element and the third data element from the first memory address in the first memory device and from the second memory address in the second memory device respectively; and
retrieving the second data element and the fourth data element from the first memory address in the second memory device and from the second memory address in the first memory device respectively;
where data is stored in the first memory and the second memory in blocks of memory locations, each block having a number of memory locations equal to a power of 2.
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Specification