Method and apparatus for thermal management of integrated circuits

• US 20020113289A1
• Filed: 02/04/2000
• Published: 08/22/2002
• Est. Priority Date: 02/04/2000
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Speidell, James Louis, Cordes, Steven Alan, Cordes, Michael James, Ghoshal, Uttam Shyamalindu, Robinson, Errol Wayne
• Granted Patent: US 6,614,109 B2
• Time in Patent Office: Days
• US Class Current: 257/528
• CPC Class Codes: H01L 23/38 Cooling arrangements using the Peltier effect
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process. Using this method, semiconductor devices including an integrated circuit and integrated modules of thermoelectric elements are formed having cooling capacities corresponding to heat dissipated from different portions of the integrated circuit. As a result, substantially uniform temperature distribution across the integrated circuit can be achieved.

Claims

1. A method of fabricating a semiconductor device comprising:

forming an integrated circuit on a front side of a substrate; and

forming an integrated thermoelectric cooler capable of cooling the integrated circuit on a back side of the substrate.

2. The method, as claimed in claim 1, wherein forming the integrated thermoelectric cooler includes forming a first thermal sink of semiconductor material on the substrate capable of absorbing thermal energy.

3. The method, as claimed in claim 2, wherein forming the first thermal sink includes forming a plurality of doped regions of semiconductor material on the substrate.

4. The method, as claimed in claim 3, wherein forming the first thermal sink includes forming one or more diodes in the plurality of doped regions.

5. The method, as claimed in claim 2, wherein forming the integrated thermoelectric cooler further includes forming one or more contacts on the first thermal sink and forming thermoelectric elements of a first type on the contacts formed on the first thermal sink.

6. The method, as claimed in claim 5, wherein forming the integrated thermoelectric cooler further includes forming a second thermal sink of semiconductor material capable of dissipating thermal energy.

7. The method, as claimed in claim 6, wherein forming the second thermal sink includes forming a plurality of doped regions of semiconductor material.

8. The method, as claimed in claim 7, wherein forming the second thermal sink includes forming one or more diodes in the plurality of doped regions.

9. The method, as claimed in claim 6, wherein forming the integrated thermoelectric cooler further includes forming one or more contacts on the second thermal sink and forming one or more thermoelectric elements of a second type on the contacts formed on the second thermal sink.

10. The method, as claimed in claim 9, further including assembling the semiconductor device by soldering the second thermal sink to the first thermal sink.

11. The method, as claimed in claim 10, wherein soldering the second thermal sink to the first thermal sink includes:

forming a layer of platinum on the one or more thermoelectric elements of the first and second types;

depositing solder on the layer of platinum on the one or more thermoelectric elements of the first and second types; and

soldering the layer of platinum on one or more thermoelectric elements of the first type to the one or more contacts formed on the second thermal sink and by soldering the layer of platinum on the one or more thermoelectric elements ofthe second type to the one or more contacts formed on the first thermal sink.

12. The method, as claimed in claim 9, wherein forming the one or more thermoelectric elements of the first and second types includes forming a first module of thermoelectric elements of the first and second types capable of cooling a first portion of the integrated circuit and at least a second module of thermoelectric elements of the first and second types capable of cooling a second portion of the integrated circuit.

13. The method, as claimed in claim 12, wherein the first module of thermoelectric elements has a first cooling capacity corresponding to thermal energy dissipated from the first portion of the integrated circuit and the second module of thermoelectric elements has a second cooling capacity corresponding to thermal energy dissipated from the second portion of the integrated circuit.

14. The method, as claimed in claim 12, wherein the first module of thermoelectric elements is associated with first bias currents corresponding to a first cooling capacity and the second module of thermoelectric elements is associated with second bias currents corresponding to a second cooling capacity.

15. The method, as claimed in claim 1, wherein said semiconductor device is associated with a information handling system.

17. The semiconductor device, as claimed in claim 16, wherein the integrated thermoelectric cooler includes a first thermal sink of semiconductor material formed on the substrate capable of absorbing thermal energy.

18. The semiconductor device, as claimed in claim 17, wherein the first thermal sink includes a plurality of doped regions of semiconductor material.

19. The semiconductor device, as claimed in claim 18, wherein the plurality of doped regions form one or more diodes.

20. The semiconductor device, as claimed in claim 17, wherein the integrated thermoelectric cooler further includes one or more contacts formed on the first thermal sink and one or more thermoelectric elements of a first type formed on the one or more contacts formed on the first thermal sink.

21. The semiconductor device, as claimed in claim 20, wherein the integrated thermoelectric cooler further includes a second thermal sink of semiconductor material capable of dissipating thermal energy.

22. The semiconductor device, as claimed in claim 21, wherein the second thermal sink includes a plurality of doped regions of semiconductor material.

23. The semiconductor device, as claimed in claim 22, wherein the second thermal sink includes one or more diodes formed in the plurality of doped regions.

24. The semiconductor device, as claimed in claim 21, wherein the integrated thermoelectric cooler further includes one or more contacts formed on the second thermal sink and one or more thermoelectric elements of a second type formed on the one or more contacts formed on the second thermal sink.

25. The semiconductor device, as claimed in claim 24, wherein the integrated thermoelectric cooler further comprises:

a layer of platinum formed on the one or more thermoelectric elements ofthe first and second types; and

solder bumps for bonding the layer of platinum on one or more thermoelectric elements of the first type to the one or more contacts formed on the second thermal sink and for bonding the layer of platinum on the one or more thermoelectric elements of the second type to the one or more contacts formed on the first thermal sink.

26. The semiconductor device, as claimed in claim 24, wherein the one or more thermoelectric elements of the first and second types include a first module of thermoelectric elements of the first and second types capable of cooling a first portion of the integrated circuit and at least a second module of thermoelectric elements of the first and second types capable of cooling a second portion of the integrated circuit.

27. The semiconductor device, as claimed in claim 26, wherein the first module of thermoelectric elements has a first cooling capacity corresponding to thermal energy dissipated from the first portion of the integrated circuit and the second module of thermoelectric elements has a second cooling capacity corresponding to thermal energy dissipated from the second portion of the integrated circuit.

28. The semiconductor device, as claimed in claim 26, wherein the first module of thermoelectric elements is associated with first bias currents corresponding to a first cooling capacity and the second module of thermoelectric elements is associated with a second bias currents corresponding to a second cooling capacity.

29. The semiconductor device, as claimed in claim 16, wherein said semiconductor device is associated with a information handling system.

16. A semiconductor device comprising:

a substrate having a front side and a back side;

an integrated circuit formed on the front side of the substrate; and

an integrated thermoelectric cooler formed on the back side of the substrate capable of cooling the integrated circuit.