Via plug adapter

• US 20020113312A1
• Filed: 04/26/2002
• Published: 08/22/2002
• Est. Priority Date: 08/27/1998
• Status: Active Grant

• Current Assignee: 3M Innovative Properties Company (3M Company)
• Original Assignee: 3M Innovative Properties Company (3M Company)
• Inventors: Schueller, Gayle R.T., Yasui, Hideaki, Yamazaki, Hideo, Saito, Yusuke, Schubert, Robert J., Clatanoff, William J.
• Granted Patent: US 6,864,577 B2
• Time in Patent Office: Days
• US Class Current: 257/737
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16237 the bump connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/2612 Auxiliary members for layer connectors, e.g. spacers
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00013 Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 2201/0367 : Metallic bump or raised conductor not used as solder bump
• CPC Class Codes: H05K 2201/0394 : Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 2201/09472 : Recessed pad for surface mounting; Recessed electrode of component
• CPC Class Codes: H05K 2201/09563 : Metal filled via
• CPC Class Codes: H05K 2201/09827 : Tapered, e.g. tapered hole, via or groove
• CPC Class Codes: H05K 2201/10681 : Tape Carrier Package [TCP]; Flexible sheet connector
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: H05K 3/363 : by soldering
• CPC Class Codes: H05K 3/4007 : Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.

Claims

1. An electronic package, comprising:

a substrate having first and second surfaces;

a plurality of beveled vias disposed in said substrate and extending between the first and second surfaces thereof, each of said vias having a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width, each of said vias being sloped away from said first surface at an angle within the range of about 20°

to about 80°

;

a plurality of conductive plugs, each of said plugs being disposed in one of said vias and terminating in a first plug surface, said plug comprising a first material, wherein said first plug surface is disposed between said first and second openings of the via;

a plurality of solder balls, each of said solder balls being disposed on the first surface of one of said plugs and comprising a second material having a lower higher shear strength than said first material;

an integrated circuit disposed on said first surface of said substrate; and

a printed circuit board disposed on a second surface of said substrate, said printed circuit board being connected to said second surface, by way of said plurality of solder balls, across a space bounded on a first side by said printed circuit board and bounded on a second side by said second surface.

2. The package of claim 1, wherein said first material comprises a material selected from the group consisting of nickel and copper.

3. The package of claim 2, wherein said second material comprises a tin-lead solder and said first material comprises nickel.

4. The package of claim 1, wherein said substrate comprises a polymeric dielectric material.

5. The package of claim 1, wherein said substrate comprises a polyimide.

6. The package of claim 1, wherein said substrate comprises a polyester.

7. The package of claim 1, wherein said substrate has a conductive layer disposed on said first surface.

8. The package of claim 7, wherein said substrate and said conductive layer form a flexible circuit.

9. The package of claim 7, wherein said integrated circuit is mounted on said conductive layer.

10. The package of claim 7, wherein said conductive layer comprises copper.

11. The package of claim 7, wherein said conductive layer comprises gold.

12. The package of claim 7, wherein said conductive layer comprises gold-plated copper.

13. The package of claim 1, wherein said substrate has a thickness within the range of about 0.5 mils to about 5.0 mils.

14. The package of claim 1, wherein said plug also terminates in a second surface which is in contact with said conductive layer.

15. The package of claim 2, wherein the integrated circuit has a surface area substantially the same size as the first surface area.

16. The package of claim 1, wherein each of said vias being sloped away from said first surface at an angle within the range of about 20°

to about 45°

.

17. The package of claim 1, wherein the first opening is circular.

18. The package of claim 17, wherein the first opening has a diameter within the range of about 0.05 mm to about 0.5 mm.

19. An electronic package, comprising:

a flexible circuit comprising a polymeric dielectric substrate having first and second surfaces, said substrate having a conductive layer disposed on said first surface;

a plurality of beveled vias disposed in said substrate and extending between the first and second surfaces thereof, each of said vias having a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width, each of said vias being sloped away from said first surface at an angle within the range of about 20°

to about 45°

;

a plurality of conductive plugs, each of said plugs being disposed in one of said vias and terminating in a first plug surface which is in contact with said conductive layer and a second plug surface which is disposed between the first and second surface of the via in which it is disposed, said plug comprising a first material selected from the group consisting of nickel and copper;

a plurality of solder balls, each of said solder balls being disposed on the second plug surface of one of said plugs;

an integrated circuit disposed on said first surface of said substrate; and

a printed circuit board disposed on a second surface of said substrate, said printed circuit board being connected to said second surface, by way of said plurality of solder balls, across a space bounded on a first side by said printed circuit board and bounded on a second side by said second surface.