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METHOD AND SYSTEM FOR DESIGN VERIFICATION OF ELECTRONIC CIRCUITS

  • US 20020116168A1
  • Filed: 11/15/1999
  • Published: 08/22/2002
  • Est. Priority Date: 11/17/1998
  • Status: Active Grant
First Claim
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1. An emulation system for emulating a circuit design comprising:

  • a computer installed with software for emulating said circuit design;

    a target FPGA for configuring said circuit design;

    a microcomputer;

    a control FPGA for controlling and monitoring said target FPGA and said microcomputer;

    a data storage unit for storing program and data of said microcomputer;

    an interface through which said circuit design is downloaded; and

    a cable connecting said computer to said interface.

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