Atomically thin highly resistive barrier layer in a copper via

• US 20020117399A1
• Filed: 02/23/2001
• Published: 08/29/2002
• Est. Priority Date: 02/23/2001
• Status: Abandoned Application

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Chen, Ling, Chen, Fusen
• Application Number:
  US09/792,737
• Publication Number:
  US 20020117399A1
• Time in Patent Office: Days
• US Class Current: 205/125
• CPC Class Codes: C23C 14/165 by cathodic sputtering
• CPC Class Codes: C23C 14/3407 Cathode assembly for sputtering apparatus, e.g. Target
• CPC Class Codes: C23C 16/45525 Atomic layer deposition [ALD]
• CPC Class Codes: C23C 28/00 Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
• CPC Class Codes: C25D 7/123 Semiconductors first coated with a seed layer or a conductive layer
• CPC Class Codes: H01J 2237/0047 using electromagnetic radiations, e.g. UV, X-rays, light
• CPC Class Codes: H01J 2237/3175 Lithography
• CPC Class Codes: H01J 37/026 Means for avoiding or neutralising unwanted electrical charges on tube components
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/28562 Selective deposition
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76844 Bottomless liners
• CPC Class Codes: H01L 21/76865 Selective removal of parts of the layer H01L21/76844 takes precedence
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 428/24802 Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
• CPC Class Codes: Y10T 428/24917 : including metal layer
• CPC Class Codes: Y10T 428/265 : 1 mil or less

Abstract

A method of forming a copper via and the resultant structure. A thin layer of an insulating barrier material, such as aluminum oxide or tantalum nitride, is conformally coated onto the sides and bottom of the via hole, for example, by atomic layer deposition (ALD) to a thickness of less than 5 nm, preferably less than 2 nm and having an electrical resistivity of more than 500 microohm-cm. A copper seed layer is then deposited under conditions such that copper is deposited on the via sidewalls but not deposited over most of the bottom of via hole. Instead energetic copper ions sputter the barrier material from the via bottom. Copper is electroplated into the via hole lined only on its sidewalls with the barrier. The invention preferably extends also to dual-damascene structures in which the copper seed sputter process sputters the barrier layer from the via bottom but not the trench floor.

Claims

1. A process of filling copper into a vertical interconnection hole extending through an inter-level dielectric layer formed in a substrate and having sides and a bottom, comprising the steps of:

coating sides and a bottom of said hole with a barrier layer of a metal oxide or nitride having an electrical resistivity greater than 500 microohm-cm;

sputtering a copper target opposed to said substrate under conditions such that a copper layer is deposited on said sides of said hole while simultaneously said barrier layer is removed from said bottom of said hole; and

then electroplating copper into said hole.

2. The process of claim 1, wherein said coating step comprises atomic layer deposition.

3. The process of claim 2, wherein said coating step alternately and repetitively deposits from respective chemical precursors a metal portion of said metal oxide and an oxygen portion of said metal oxide.

4. The process of claim 2, wherein said coating step alternately and repetitively deposits from respective chemical precursors a metal portion of said metal nitride and a nitrogen portion of said metal nitride.

5. The process of claim 1, wherein said barrier layer has a thickness on said sides of no more than 5 nm.

6. The process of claim 5, wherein said thickness is no more than 2 nm.

7. The process of claim 6, wherein said thickness is at least 0.5 nm.

8. The process of claim 1, wherein said barrier layer comprises a metal oxide.

9. The process of claim 8, wherein said metal oxide comprises an oxide of a refractory metal chosen from Groups IVB, VB, and VIB of the periodic table.

10. The process of claim 9, wherein said metal oxide comprises aluminum oxide.

11. The process of claim 1, wherein said barrier layer comprises tantalum nitride.

13. The process of claim 12, wherein said resistivity is greater than 1000 micro ohm-cm.

14. The process of claim 12, wherein said thickness is no more than 2 nm.

15. The process of claim 14, wherein said thickness is at least 0.5 nm.

16. The process of claim 16, wherein said barrier layer comprises an oxide of a refractory metal chosen from Groups IVB, VB, and VIB of the periodic table.

17. The process of claim 16, wherein said oxide comprises aluminum oxide.

18. The process of claim 12, wherein said barrier layer comprises tantalum nitride.

20. The copper via structure of claim 19, wherein said oxide barrier layer comprises an oxide of a refractory metal chosen from Groups IVB, VB, and VIB of the periodic table.

21. The copper via structure of claim 20, wherein said oxide barrier layer comprises aluminum oxide.

22. The copper via structure of claim 19, wherein said barrier layer has a thickness on said sides of said hole of no more than 5 nm.

23. The copper via structure of claim 22, wherein said thickness is no more than 2 nm.

24. The copper via structure of claim 25, wherein said thickness is at least 0.5 nm.

26. The copper via structure of claim 25, wherein said thickness is no more than 2 nm.

27. The copper via structure of claim 26, wherein said thickness is no more than 0.5 nm.

28. The copper via structure of claim 25, wherein said barrier layer comprises a metal oxide.

29. The copper via structure of claim 28, wherein said metal oxide comprises aluminum oxide.

30. The copper via structure of claim 25, wherein said barrier layer comprises a metal nitride.

31. The copper via structure of claim 30, wherein said metal nitride comprises tantalum nitride.

12. A process of filling copper into a vertical interconnection hole extending through an inter-level dielectric layer formed in a substrate and having sides and a bottom, comprising the steps of:

coating sides and a bottom of said hole with a barrier layer of a metal oxide or nitride having an electrical resistivity greater than 500 microohm-cm and a thickness on said sides of less than 5 nm;

removing said barrier layer from said bottom;

sputtering a copper target opposed to said substrate to deposit a copper layer on at least said sides; and

then electroplating copper into said hole.

19. A copper via structure, comprising:

a lower dielectric layer having a copper feature formed in its surface;

an upper dielectric layer formed over said lower dielectric layer and having a hole formed therethrough in an area of said copper feature;

a barrier layer comprising a metal oxide formed on sides of said hole but not on a bottom of said hole facing said copper feature; and

copper filled into said hole and contacting said copper feature.

25. A copper via structure, comprising:

a lower dielectric layer having a copper feature formed in its surface;

an upper dielectric layer formed over said lower dielectric layer and having a hole formed therethrough in an area of said copper feature;

a barrier layer comprising a metal oxide or nitride formed on sides of said hole to a thickness of no more than 5 nm but not on a bottom of said hole facing said copper feature; and

copper filled into said hole and contacting said copper feature.

32. A copper via structure, comprising:

a lower dielectric layer having a conductive feature formed in its surface;

an upper dielectric layer formed over said lower dielectric layer and having a hole formed therethrough in an area of said conductive feature;

a barrier layer comprising tantalum nitride formed on sides of said hole to a thickness of greater than 0.5 nm and no more than 5 nm but not on a bottom of said hole facing said conductive feature; and

copper filled into said hole.

33. The copper via structure of claim 32, wherein said thickness is no more than 2 nm.