Digital audio transmission over a digital visual interface (DVI) link

• US 20020118762A1
• Filed: 05/08/2001
• Published: 08/29/2002
• Est. Priority Date: 12/20/2000
• Status: Abandoned Application

• Current Assignee: Valence Semiconductor, Inc.
• Original Assignee: Valence Semiconductor, Inc.
• Inventors: Nikneshan, Sasan, Shakiba, Mohammad Hossein, Negahban, Mehrdad
• Application Number:
  US09/852,215
• Publication Number:
  US 20020118762A1
• Time in Patent Office: Days
• US Class Current: 375/240.28
• CPC Class Codes: G09G 2370/04 Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
• CPC Class Codes: G09G 2370/12 Use of DVI or HDMI protocol in interfaces along the display data pipeline
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: H04H 60/93 Wired transmission systems
• CPC Class Codes: H04L 5/02 Channels characterised by the type of signal
• CPC Class Codes: H04L 7/0008 Synchronisation information channels, e.g. clock distribution lines
• CPC Class Codes: H04N 21/2368 Multiplexing of audio and video streams
• CPC Class Codes: H04N 21/242 Synchronization processes, e.g. processing of PCR [Program Clock References] arrangements for synchronising broadcast or distribution via plural systems in broadcast distribution systems H04H20/18
• CPC Class Codes: H04N 21/4305 Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/4341 Demultiplexing of audio and video streams
• CPC Class Codes: H04N 21/8458 involving uncompressed content

Abstract

In general, a system and method for routing audio over a Digital Visual Interface (DVI) link is described herein. In one embodiment, the system comprises a a Digital Audio Interface (DAI) transmitter and a DAI receiver. Coupled to a fourth channel of the DVI link that transmits a pixel-rate clock signal, the DAI transmitter modulates the pixel-rate clock signal by input digital audio. The DAI transmitter sends the modulated clock signal to the DAI receiver. The DAI receiver recovers the digital audio from the modulated pixel-rate clock signal.

Claims

1. A Digital Audio Interface (DAI) transmitter, comprising:

a first input to receive a clock signal over a selected channel of a Digital Visual Interface (DVI) link;

a second input to receive digital audio; and

a modulator coupled to the first input and the second input, the modulator to modulate the clock signal by the digital audio.

2. The DAI transmitter of claim 1, wherein the DVI link includes a plurality of channels of which the selected channel provides the clock signal at a pixel-rate less than a serial rate for transmission of data streamed over other channels of the plurality of channels.

5. The DAI transmitter of claim 1 being coupled to a DAI receiver for recovery of the digital audio from the modulated clock signal.

6. The DAI transmitter of claim 5 being further coupled to a Transmission Minimized Differential Signaling (TMDS) receiver over the DVI link, the TMDS receiver to receive the modulated clock signal.

3. The DAI transmitter further comprising:

an encoder coupled to the second input, the encoder to encode the digital audio before receipt by the modulator.

4. The DAI transmitter of claim 3, wherein the digital audio used for modulation of the clock signal is encoded.

7. A Digital Audio Interface (DAI) receiver, comprising:

an input to receive a modulated clock signal being formed by a clock signal over a Digital Visual Interface (DVI) link modulated by digital audio; and

a demodulator coupled to the input, the demodulator to recover the digital audio from the modulated clock signal.

8. The DAI receiver of claim 7, further comprising:

a clock recovery unit coupled to the input, the clock recovery unit to recover the clock signal from the modulated clock signal and to provide the recovered clock signal to the demodulator.

9. The DAI receiver of claim 7 being coupled to a Transmission Minimized Differential Signaling (TMDS) receiver to receive a clock signal recovered from the modulated clock signal.

10. The DAI receiver of claim 8 further comprising:

a decoder coupled to the demodulator to decode the recovered digital audio.

11. The DAI receiver of claim 7 being coupled to a clock recovery unit, receiving a recovered clock signal from the clock recovery unit, and using the recovered clock signal to recover the digital audio from the modulated clock signal.

13. The system of claim 12, wherein at least three of the plurality of channels to transmit data streams at a serial rate having a frequency substantially greater than a frequency of the pixel-rate clock signal.

14. The system of claim 13, wherein the serial rate is ten times greater than the frequency of the pixel-rate clock signal.

15. The system of claim 12, wherein the DAI transmitter to encode the digital audio and to modulate the pixel-rate clock signal with the encoded digital audio.

16. The system of claim 15, wherein the DAI receiver to demodulate the modulated pixel-rate clock signal to recover the encoded digital audio and then decode the encoded digital audio.

17. The system of claim 12, wherein the DAI receiver to receive a clock signal from a source and use the clock signal to recover the digital audio from the modulated pixel-rate clock signal.

18. The system of claim 17, wherein the clock signal is a recovered clock signal from the modulated pixel-rate clock signal.

19. The system of claim 18, wherein the source is a Transmission Minimized Differential Signaling (TMDS) receiver.

12. A system comprising:

a Digital Visual Interface (DVI) link including a plurality of channels, one of the plurality of channels to transmit a pixel-rate clock signal;

a Digital Audio Interface (DAI) transmitter coupled to the one of the plurality of channels, the DAI transmitter to modulate the pixel-rate clock signal by digital audio; and

a DAI receiver coupled to the DAI transmitter, the DAI receiver to recover the digital audio from the modulated pixel-rate clock signal.

20. A method comprising:

receiving a clock signal over a channel of a Digital Visual Interface (DVI) link;

receiving digital audio;

modulating the clock signal by the digital audio to produce a modulated clock signal; and

outputting the modulated clock signal for subsequent recovery of the digital audio.

21. The method of claim 20, wherein the outputting of the modulated clock signal further comprises:

transmitting the modulated clock signal over a dedicated link;

recovering the clock signal from the modulated clock signal; and

recovering the digital audio by demodulating the modulated clock signal using the recovered clock signal.

22. A method for transmission of digital audio over a Digital Visual Interface (DVI) link, the method comprising:

receiving a clock signal over a channel of the DVI link;

receiving digital audio;

encoding the digital audio;

modulating the clock signal by the encoded digital audio to produce a modulated clock signal; and

outputting the modulated clock signal for subsequent recovery of the digital audio.

23. The method of claim 22, wherein the outputting of the modulated clock signal further comprises:

transmitting the modulated clock signal over a dedicated link;

recovering the clock signal from the modulated clock signal;

recovering the encoded digital audio by demodulating the modulated clock signal using the recovered clock signal; and

decoding the encoded digital audio to recover the digital audio.