Digital signal processing based de-serializer
First Claim
1. A digital signal processing based serializer/de-serializer, comprising:
- a receiver that includes an analog to digital converter and a digital signal processor, the digital signal processor is operably coupled to an output of the analog to digital converter;
wherein the analog to digital converter samples modulated serial data to generate digital samples of the modulated serial data; and
the digital signal processor adaptively determines compensation operations to be performed by the receiver on the digital samples of the modulated serial data so that the digital samples of the modulated serial data may be properly characterized to extract digital data contained therein.
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Accused Products
Abstract
A DSP based SERDES performs compensation operations to support high speed deserialization. A receiver section of the DSP based SERDES includes one or more ADCs and DSPs. The ADC operates to sample (modulated) analog serial data and to produce digitized serial data (digital representation of the modulated analog serial data). The DSP communicatively couples to the ADC and receives the digitized serial data. Based upon the known characteristics of the digitized serial data and the digitized serial data itself, the DSP determines compensation operations to be performed upon the serial data to compensate for inadequacies of the receiver and/or channel response. These compensation operations may be (1) performed on the analog serial data before digitization by the ADC; (2) applied to the ADC to modify the operation of the ADC; and/or (3) performed on the digitized serial data by the DSP or another device.
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Citations
184 Claims
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1. A digital signal processing based serializer/de-serializer, comprising:
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a receiver that includes an analog to digital converter and a digital signal processor, the digital signal processor is operably coupled to an output of the analog to digital converter;
wherein the analog to digital converter samples modulated serial data to generate digital samples of the modulated serial data; and
the digital signal processor adaptively determines compensation operations to be performed by the receiver on the digital samples of the modulated serial data so that the digital samples of the modulated serial data may be properly characterized to extract digital data contained therein. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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42. A transceiver, comprising:
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a receiver comprising a plurality of analog to digital converters and a digital signal processor; and
wherein each analog to digital converter within the plurality of analog to digital converters digitally samples analog serial signal to generate digital data arranged across a plurality of channels, each channel of the plurality of channels extends from one analog to digital converter within the plurality of analog to digital converters; and
the digital signal processor adaptively determines a parallel based compensation and a parallel based operation to be performed to ensure a proper characteristic of the digital data. - View Dependent Claims (43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79)
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80. A transceiver, comprising:
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a receiver comprising a plurality of analog to digital converters and a digital signal processor; and
wherein each analog to digital converter within the plurality of analog to digital converters sequentially samples analog serial signal to generate digital data arranged across a plurality of channels;
each channel of the plurality of channels extends from one analog to digital converter within the plurality of analog to digital converters;
the digital signal processor comprises at least one of a feedback equalizer and a decision feedback equalizer that is operable to adaptively identify error information that is used to determine a parallel based compensation and a parallel based operation to be performed to ensure a proper characteristic of the digital data;
the parallel based operation comprises adjusting an operational parameter of at least one analog to digital converter within the plurality of analog to digital converters; and
the digital signal processor communicates feedback control individually to each analog to digital converter within the plurality of analog to digital converters. - View Dependent Claims (81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 130, 131, 132, 133, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174)
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113. A method to perform digital signal processing based de-serialization of analog serial signal, the method comprising:
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receiving analog serial signal;
digitally sampling the analog serial signal to generate digital data;
analyzing the digital data to determine whether any compensation is required to ensure a proper characteristic of the digital data by employing digital signal processing techniques;
adaptively identifying a compensation operation when it is determined that compensation is required, the compensation operation being selected to ensure the proper characteristic; and
providing compensation control to a device that is operable to perform the compensation operation.
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129. A method to perform digital signal processing based de-serialization of analog serial signal, the method comprising:
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pre-computing a plurality of possible compensation operation options;
receiving analog serial signal;
digitally, sequentially sampling the analog serial signal to generate digital data using a plurality of interleaved analog to digital converters;
analyzing the digital data, using a digital signal processor, to adaptively determine whether any compensation is required to ensure a proper characteristic of the digital data by employing digital signal processing techniques;
selecting a compensation operation when it is determined that compensation is required, the compensation operation being selected to ensure the proper characteristic, the compensation operation being selected from the plurality of possible compensation operation options;
providing compensation control to a device that is operable to perform the compensation operation; and
wherein the compensation, when required, is implemented by adjusting an operational characteristic of at least one analog to digital converter within the plurality of interleaved analog to digital converters.
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134. A digital signal processing based serializer/de-serializer, comprising:
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a receiver that includes an analog to digital converter and a digital signal processor that is operably coupled to an output of the analog to digital converter;
wherein the analog to digital converter samples modulated serial data to generate digital samples of the modulated serial data;
the modulated serial data is provided to the receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples to extract the digital data contained therein.
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175. A transceiver, comprising:
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a serializer/de-serializer receiver, that receives modulated serial data from a serializer/de-serializer transmitter, that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample the modulated serial data to generate digital samples of the modulated serial data; and
the digital signal processor demodulates the digital samples to extract the digital data contained therein.
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176. A transceiver, comprising:
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a serializer/de-serializer receiver, that receives modulated serial data from a serializer/de-serializer transmitter, that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample the modulated serial data to generate digital samples of the modulated serial data;
the digital signal processor employs parallel processing techniques to compensate for non-uniformity among interleaves of the plurality of interleaved analog to digital converters; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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177. A transceiver, comprising:
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a serializer/de-serializer receiver that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample modulated serial data to generate digital samples of the modulated serial data;
the digital signal processor employs parallel processing techniques to compensate for non-uniformity among interleaves of the plurality of interleaved analog to digital converters;
the modulated serial data is provided to the serializer/de-serializer receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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178. A transceiver, comprising:
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a serializer/de-serializer receiver that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample modulated serial data to generate digital samples of the modulated serial data;
the modulated serial data is provided to the serializer/de-serializer receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples to extract the digital data contained therein.
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179. A transceiver, comprising:
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a serializer/de-serializer receiver, that receives the modulated serial data from a serializer/de-serializer transmitter, that includes an analog to digital converter and a digital signal processor, the digital signal processor being communicatively coupled to an output of the analog to digital converter;
the analog to digital converter samples modulated serial data to generate digital samples of the modulated serial data; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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180. A transceiver, comprising:
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a serializer/de-serializer receiver that includes an analog to digital converter and a digital signal processor, the digital signal processor being communicatively coupled to an output of the analog to digital converter;
the analog to digital converter samples modulated serial data to generate digital samples of the modulated serial data;
the modulated serial data is provided to the serializer/de-serializer receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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181. A transceiver, comprising:
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a serializer/de-serializer receiver, that receives modulated serial data from a serializer/de-serializer transmitter, that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample the modulated serial data to generate digital samples of the modulated serial data; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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182. A transceiver, comprising:
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a serializer/de-serializer receiver the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample modulated serial data to generate digital samples of the modulated serial data;
the modulated serial data is provided to the serializer/de-serializer receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples using parallel processing techniques to extract the digital data contained therein.
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183. A transceiver, comprising:
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a serializer/de-serializer receiver, that receives modulated serial data from a serializer/de-serializer transmitter, that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample the modulated serial data to generate digital samples of the modulated serial data;
the digital signal processor compensates for non-uniformity among interleaves of the plurality of interleaved analog to digital converters; and
the digital signal processor demodulates the digital samples to extract the digital data contained therein.
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184. A transceiver, comprising:
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a serializer/de-serializer receiver that includes a plurality of interleaved analog to digital converters and a digital signal processor, the digital signal processor being communicatively coupled to an output of the plurality of interleaved analog to digital converters;
the plurality of interleaved analog to digital converters operate cooperatively to sample modulated serial data to generate digital samples of the modulated serial data;
the digital signal processor compensates for non-uniformity among interleaves of the plurality of interleaved analog to digital converters;
the modulated serial data is provided to the serializer/de-serializer receiver by a serializer/de-serializer transmitter across at least one of a trace on a printed circuit board and a backplane; and
the digital signal processor demodulates the digital samples to extract the digital data contained therein.
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Specification