Apparatus and method for adjusting filter frequency in relation to sampling frequency
First Claim
1. In a data acquisition unit, a self-tuning filter, comprising:
- a digital clocking signal;
an input coupled to said digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal changes to a predetermined state; and
a clock-tunable filter coupled to said digital clocking signal, whereby the frequency of the clock-tunable filter is adjusted in relation to a sampling frequency at which the digital clocking signal operates.
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Abstract
A self-tuning filter is disclosed. The self-tuning filter includes a digital clocking signal and an input coupled to the digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal changes to a predetermined state. A clock-tunable filter is, furthermore, coupled to the digital clocking signal so that the frequency of the clock-tunable filter is adjusted in relation to a sampling frequency at which the digital clocking signal operates. The self-tuning filter may be applied to an input of a data acquisition unit and applied to an input having a variable sampling frequency. A method of controlling the frequency of a clock-tunable filter is also disclosed.
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Citations
14 Claims
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1. In a data acquisition unit, a self-tuning filter, comprising:
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a digital clocking signal;
an input coupled to said digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal changes to a predetermined state; and
a clock-tunable filter coupled to said digital clocking signal, whereby the frequency of the clock-tunable filter is adjusted in relation to a sampling frequency at which the digital clocking signal operates. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. In a data acquisition unit, a self-tuning filter, comprising:
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a digital clocking signal;
an input coupled to said digital clocking signal, whereby the input reads a value incident on the input when the digital clocking signal changes to a predetermined state and the digital clocking signal changes to the predetermined state at a varying rate;
a phase-lock loop coupled to said digital clocking signal; and
a clock-tunable filter coupled to said phase-lock loop, whereby the frequency of the clock tunable filter is a multiple of the sampling frequency at which the digital clocking signal changes to the predetermined state. - View Dependent Claims (13, 14)
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12. A method of controlling the frequency of a clock-tunable filter, comprising:
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sensing a frequency at which a digital clocking signal changes state, whereby said digital clocking signal causes an input to read a value incident on the input when the digital clocking signal changes to a predetermined state;
adjusting a frequency of a clock-tunable filter in relationship to the frequency at which the digital clocking signal changes state.
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Specification