Comparator circuit

• US 20020125942A1
• Filed: 02/14/2002
• Published: 09/12/2002
• Est. Priority Date: 02/14/2001
• Status: Abandoned Application

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Dunnebacke, Joachim, Schnabel, Steffen
• Application Number:
  US10/074,217
• Publication Number:
  US 20020125942A1
• Time in Patent Office: Days
• US Class Current: 330/69
• CPC Class Codes: G01R 19/16566 Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
• CPC Class Codes: H03K 3/02337 Bistables with hysteresis, e.g. Schmitt trigger non-regenerative amplitude discriminators G01R19/165

Abstract

A comparator circuit and voltage level detector comprising such comparator circuit including a first operational amplifier having a differential input, first and second voltage dividers being coupled to, respectively, a variable and a constant voltage source, outputs thereof being coupled to the differential input for supplying a differential input voltage thereto. The first operational amplifier having an output being coupled to its differential input and providing an output voltage stepwise varying between first and second voltage levels at an inversion of the differential input voltage. In order to lower power consumption and increase the accuracy of level detection, one of the first and second voltage dividers is being provided with a stepwise variable voltage dividing factor, which is controlled by the output voltage of the first operational amplifier to increase the magnitude of the differential input voltage by a step value upon such inversion of the differential input voltage.

Claims

1. A comparator circuit, comprising:

a first operational amplifier having a differential input;

first and second voltage dividers coupled to a variable and a constant voltage source, respectively, having outputs coupled to the differential input to supply a differential input voltage thereto,

the first operational amplifier having an output coupled to the differential input and providing an output voltage stepwise varying between first and second voltage levels at an inversion of the differential input voltage, and

one of the first and second voltage dividers having a stepwise variable voltage dividing factor controlled by the output voltage of the first operational amplifier to increase the magnitude of the differential input voltage by a step value upon the inversion of the differential input voltage.

2. The comparator circuit according to claim 1, wherein one of the first and second voltage dividers has a stepwise variable voltage dividing factor including a controlled voltage divider comprising a resistor and a switched controlled resistor device arranged serially, a common node thereof comprising an output of the controlled voltage divider, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to vary a resistance by a step value upon an inversion of the differential input voltage.

3. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the second voltage divider supplying a predetermined ratio of the output voltage of the constant voltage source to the non-inverting input terminal, the first voltage comprising the controlled voltage divider having the resistor and the switched controlled resistor device connected between the variable voltage source and mass, the output thereof coupled to the inverting input terminal, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to increase the resistance by a step value upon an inversion of the differential input voltage caused by an increase of the voltage at the inverting input terminal above the voltage at the non-inverting input terminal.

4. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the first voltage divider supplying a predetermined ratio of the output voltage of the variable voltage source to the inverting input terminal, the second voltage divider comprising the controlled voltage divider having the resistor and the switched controlled resistor device connected between the constant voltage source and mass, the output thereof coupled to the non-inverting input terminal, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to decrease a resistance by a step value upon an inversion of the differential input voltage caused by an increase of the voltage at the inverting input terminal above the voltage at the non-inverting input terminal.

5. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the second voltage divider supplying a predetermined ratio of the output voltage of the constant voltage source to the non-inverting input terminal, the first voltage divider comprising the controlled voltage divider having the switched controlled resistor device and the resistor connected between the variable voltage source and mass, the output thereof coupled to the inverting input terminal, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to decrease the resistance by a step value upon an inversion of the differential input voltage caused by an increase of the voltage at the inverting input terminal above the voltage at the non-inverting input terminal.

6. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the first voltage divider supplying a predetermined ratio of the output voltage of the variable voltage source to the inverting input terminal, the second voltage divider comprising the controlled voltage divider having the switched controlled resistor device and the resistor connected between the constant voltage source and mass, the output thereof coupled to the non-inverting input terminal, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to increase the resistance by a stop value upon an inversion of the differential input voltage caused by an increase of the voltage at the inverting input terminal above the voltage at the non-inverting input terminal.

7. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the first voltage divider supplying a predetermined ratio of the output voltage of the variable voltage source to the non-inverting input terminal, the second voltage divider comprising the controlled voltage divider having the resistor and the switched controlled resistor device connected between the constant voltage source and mass, the output thereof coupled to the inverting input terminal, the switched controlled resistor device controlled by the output voltage of the first operational amplifier to increase the resistance by a step value upon an inversion of the differential input voltage caused by a decrease of the voltage at the non-inverting input terminal below the voltage at the inverting input terminal.

8. The comparator circuit according to claim 2, wherein the differential input of the first operational amplifier comprises an inverting and a non-inverting input terminal, the first voltage divider comprising a first controlled voltage divider having a resistor and first switched controlled resistor connected between the variable voltage source and mass, the output thereof coupled to the noninverting input terminal, the second voltage divider comprising a second controlled voltage divider having a second switched controlled resistor device and a resistor connected between the constant voltage source and mass supplying a predetermined ratio of the output voltage of the constant voltage source to the inverting input terminal, the first and second switched controlled resistor device controlled by the output voltage of the first operational amplifier to decrease their resistance by a step value upon an inversion of the differential input voltage caused by an decrease of the voltage at the non-inverting input terminal below the voltage at the inverting input terminal.

9. The comparator circuit according to claim 2, wherein the switched controlled resistor device comprises a pair of resistors arranged serially, one of which is shunted by a controllable switching device.

10. The comparator circuit according to claim 2, wherein the switched controlled resistor device comprises a resistor coupled in parallel to a serial arrangement of another resistor and a controllable switching device.

11. The comparator circuit according to claim 2, wherein a cascade of n operational amplifiers including the first operational amplifier having the first and second voltage dividers in common, the first voltage divider comprising a first to (2n+1) resistors coupled between the variable voltage source and mass and having first to 2n outputs at the nodes between the resistors, the first to n^th outputs of the second voltage divider coupled to the inverting inputs of the first to n^th operational amplifiers, respectively, the (n+1) to 2n outputs shunted through first to n^th controllable switching devices, respectively, to mass, the second voltage divider supplying a predetermined ratio of the output voltage of the constant voltage source to the non-inverting input terminals of each operational amplifier.

12. The comparator circuit according to claim 11, wherein each of the switching devices comprise a switching transistor implemented in MOS technology.

13. The comparator circuit according to one of claim 11, wherein each of the switching devices comprise a bipolar switching transistor.

14. The comparator circuit according to claim 11, wherein each of the switching devices comprise a transistor implemented in MOS technology.

16. The voltage level detector according to claim 15, further comprising an integration of interference pulses on the output voltage of both voltage dividers.

17. The comparator circuit according to claim 9, wherein each of the switching devices comprise a switching transistor implemented in MOS technology.

18. The comparator circuit according to one of claim 9, wherein each of the switching devices comprise a bipolar switching transistor.

19. The comparator circuit according to claim 9, wherein each of the switching devices comprise a transistor implemented in MOS technology.

15. A voltage level detector, comprising:

a comparator comprising;

a first operational amplifier having a differential input;

first and second voltage dividers coupled to a variable and a constant voltage source, respectively, having outputs coupled to the differential input to supply a differential input voltage thereto,

the first operational amplifier having an output coupled to the differential input and providing an output voltage stepwise varying between first and second voltage levels at an inversion of the differential input voltage, and

one of the first and second voltage dividers having a stepwise variable voltage dividing factor controlled by the output voltage of the first operational amplifier to increase the magnitude of the differential input voltage by a step value upon the inversion of the differential input voltage, wherein

the constant voltage source is temperature stabilized.