Voice packet processor and method of operation thereof

• US 20020126677A1
• Filed: 10/31/2001
• Published: 09/12/2002
• Est. Priority Date: 11/02/2000
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Zsohar, Leslie, Sonnier, David P., Hathaway, Michael W.
• Granted Patent: US 7,075,936 B2
• Time in Patent Office: Days
• US Class Current: 370/395.64
• CPC Class Codes: H04L 2012/5656 using the AAL2
• CPC Class Codes: H04L 2012/5671 Support of voice
• CPC Class Codes: H04L 49/3081 ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections

Abstract

A voice packet processor for use with voice applications employing a fast pattern processor (FPP) and a routing switch processor (RSP) that receive and transmit protocol data units (PDUs) and a method of operation thereof. In one embodiment, the voice packet processor includes (1) a voice packet controller (VPC) configured to receive the PDUs from the FPP and queue the PDUs for processing, (2) a voice packet parser configured to receive the PDUs that are ATM adaptation layer 2 (AAL2) cells containing voice data from the VPC, parse the AAL2 cells into at least one Common Part Sublayer (CPS) packet and transmit the at least one CPS packet to the RSP, and (3) a voice packet assembler configured to receive the PDUs that are CPS packets from the VPC, assemble the CPS packets into at least one AAL2 Cell and transmit the at least one AAL2 cell to the RSP.

Claims

1. For use with voice applications employing a fast pattern processor and a routing switch processor that receive and transmit protocol data units (PDUs), a voice packet processor, comprising:

a voice packet controller configured to receive said PDUs from said fast pattern processor and queue said PDUs for processing;

a voice packet parser configured to receive said PDUs that are Asynchronous Transfer Mode (ATM) adaptation layer 2 (AAL2) cells containing voice data from said voice packet controller, parse said AAL2 cells into at least one Common Part Sublayer (CPS) packet and transmit said at least one CPS packet to said routing switch processor; and

a voice packet assembler configured to receive said PDUs that are CPS packets from said voice packet controller, assemble said CPS packets into at least one AAL2 Cell and transmit said at least one AAL2 cell to said routing switch processor.

2. The voice packet processor of claim 1 wherein said voice packet controller is further configured to bypass processing and retransmit said PDUs to said routing switch processor if said PDUs are not AAL2 type cells or CPS packets.

3. The voice packet processor of claim 1 wherein said voice packet controller is further configured to bypass processing and retransmit said PDUs to said routing switch processor if said PDUs do not contain voice data.

4. The voice packet processor of claim 1 wherein said voice packet controller is further configured to determine a processing type for each of said PDUs and employ said processing type to queue said PDUs for processing or for bypassing processing to retransmit said PDUs unaltered to said routing switch processor.

5. The voice packet processor of claim 1 wherein said voice packet parser is further configured to perform CPS packet switching by rerouting said at least one CPS packet from said routing switch processor to said voice packet assembler for incorporation into an AAL2 transmission stream.

6. The voice packet processor of claim 5 wherein said voice packet parser is further configured to modify the channel identifier of said at least one CPS packet to allow for channel identifier mapping.

7. The voice packet processor of claim 1 wherein said voice packet assembler is further configured to employ a virtual connection timer to transmit said at least one AAL2 cell if a payload of said at least one AAL2 cell is not filled within a set time.

8. The voice packet processor of claim 1 wherein said voice packet processor employs a parser destination ID, an assembler destination ID, or a bypass destination ID to track and route PDUs from said fast pattern processor to said routing switch processor.

9. The voice packet processor of claim 1 further includes a reassembly buffer configured to hold said PDUs for transmission, hold said PDUs for subsequent associated PDUs, and provide a reordering mechanism to ensure said PDUs are processed in an order.

10. The voice packet processor of claim 1 wherein said voice packet parser and said voice packet assembler are further configured to additionally parse and assemble multi-packed AAL2 cells respectively.

11. For use with voice applications employing a fast pattern processor and a routing switch processor that receive and transmit protocol data units (PDUs), a method of operating a voice packet processor, comprising:

receiving in a voice packet controller said PDUs from said fast pattern processor and queuing said PDUs for processing;

receiving in a voice packet parser said PDUs that are Asynchronous Transfer Mode (ATM) adaptation layer 2 (AAL2) cells containing voice data from said voice packet controller, parsing said AAL2 cells into at least one Common Part Sublayer (CPS) packet and transmitting said at least one CPS packet to said routing switch processor; and

receiving in a voice packet assembler said PDUs that are CPS packets from said voice packet controller, assembling said CPS packets into at least one AAL2 Cell and transmitting said at least one AAL2 cell to said routing switch processor.

12. The method of claim 11 wherein said receiving in said voice packet controller further comprises bypassing processing and retransmitting said PDUs to said routing switch processor if said PDUs are not AAL2 type cells or CPS packets.

13. The method of claim 11 wherein said receiving in said voice packet controller further comprises bypassing processing and retransmitting said PDUs to said routing switch processor if said PDUs do not contain voice data.

14. The method of claim 11 wherein said receiving in said voice packet controller further comprises determining a processing type for each of said PDUs and employing said processing type to queue said PDUs for processing or for bypassing processing to retransmit said PDUs unaltered to said routing switch processor.

15. The method of claim 11 wherein said receiving in said voice packet parser further comprises performing CPS packet switching by rerouting said at least one CPS packet from said routing switch processor to said voice packet assembler for incorporation into an AAL2 transmission stream.

16. The method of claim 15 wherein said receiving in said voice packet parser further comprises modifying the channel identifier of said at least one CPS packet to allow for channel identifier mapping.

17. The method of claim 11 wherein said receiving in said voice packet assembler further comprises employing a virtual connection timer for transmitting said at least one AAL2 cell if a payload of said at least one AAL2 cell is not filled within a set time.

18. The method of claim 11 further comprises employing a parser destination ID, an assembler destination ID, or a bypass destination ID for tracking and routing PDUs from said fast pattern processor to said routing switch processor.

19. The method of claim 11 further comprises holding in a reassembly buffer said PDUs for transmission, holding said PDUs for subsequent associated PDUs, and providing a reordering mechanism for ensuring said PDUs are processed in an order.

20. The method of claim 11 wherein said receiving in said voice packet parser and said receiving in said voice packet assembler further comprises additionally parsing and assembling multi-packed AAL2 cells respectively.

21. A carrier class voice gateway, comprising:

a fabric interface controller that interfaces with a fabric network to send and receive Asynchronous Transfer Mode (ATM) adaptation layer 2 (AAL2) cells and protocol data units (PDUs);

a digital signal processing (DSP) module that digitizes and stores received voice communications in Common Part Sublayer (CPS) packets, and converts said CPS packets to transmit voice communications; and

a packet processing system that interfaces with said DSP module and said fabric interface controller to send and receive said CPS packets, said AAL2 cells or said PDUs, said packet processing system, including;

a fast pattern processor (FPP) that receives said CPS packets, said AAL2 cells or said PDUs, and performs pattern recognition and classification on said CPS packets, said AAL2 cells or said PDUs,

a voice packet processor, having;

a voice packet controller that receives said CPS packets, said AAL2 cells or said PDUs from said FPP and queues said CPS packets, said AAL2 cells or said PDUs for processing,

a voice packet parser that receives said AAL2 cells containing voice data from said voice packet controller, parses said AAL2 cells into at least one CPS packet and transmits said at least one CPS packet, and

a voice packet assembler that receives said CPS packets from said voice packet controller, assembles said CPS packets into at least one AAL2 cell and transmits said at least one AAL2 cell, and

a routing switch processor (RSP) that receives said at least one CPS packet, said at least one AAL2 cell or said PDUs from said voice packet processor, performs routing functions and/or traffic management, transmits said at least one CPS packet to said DSP module, and transmits said at least one AAL2 cell or said PDUs to said fabric interface controller.

22. The carrier class voice gateway of claim 21 wherein said voice packet controller, said voice packet parser and said voice packet assembler process at least a portion of said CPS packets, said AAL2 cells or said PDUs.

23. The carrier class voice gateway of claim 21 wherein said voice packet controller bypasses processing and retransmits said PDUs to said RSP if said PDUs do not contain voice data.

24. The carrier class voice gateway of claim 21 wherein said voice packet controller bypasses processing and retransmits said PDUs, said CPS packets or said AAL2 cells based on a bypass indicator received from said FPP.

25. The carrier class voice gateway of claim 21 wherein said voice packet parser further performs CPS packet switching by rerouting said at least one CPS packet from said RSP to said voice packet assembler for incorporation into an AAL2 transmission stream.

26. The carrier class voice gateway of claim 25 wherein said voice packet parser further modifies the channel identifier of said at least one CPS packet to allow for channel identifier mapping.

27. The carrier class voice gateway of claim 21 wherein said voice packet assembler further employs a virtual connection timer to transmit said at least one AAL2 cell if a payload of said at least one AAL2 cell is not filled within a set time.

28. The carrier class voice gateway of claim 21 wherein said voice packet process or employs a parser destination ID, an assembler destination ID, or a bypass destination ID to track and route said CPS packets, said AAL2 cells and said PDUs from said FPP to said RSP.

29. The carrier class voice gateway of claim 21 further includes a reassembly buffer that holds said CPS packets, said AAL2 cells or said PDUs for transmission, hold said CPS packets, said AAL2 cells or said PDUs for subsequent associated CPS packets, AAL2 cells or PDUs respectively, and provides a reordering mechanism to ensure said CPS packets, said AAL2 cells or said PDUs are processed in an order.

30. The carrier class voice gateway of claim 21 wherein said voice packet parser and said voice packet assembler further parse and assemble multi-packed AAL2 cells respectively.

31. For use with voice applications employing protocol data units (PDUs), a voice packet processor, comprising:

a voice packet controller configured to receive said PDUs and queue said PDUs for processing;

a voice packet parser configured to receive said PDUs that are Asynchronous Transfer Mode (ATM) adaptation layer 2 (AAL2) cells containing voice data from said voice packet controller, parse said AAL2 cells into at least one Common Part Sublayer (CPS) packet and transmit said at least one CPS packet; and

a voice packet assembler configured to receive said PDUs that are CPS packets from said voice packet controller, assemble said CPS packets into at least one AAL2 Cell and transmit said at least one AAL2 cell.

32. The voice packet processor of claim 31 wherein said voice packet controller is further configured to bypass processing and retransmit said PDUs if said PDUs are not AAL2 type cells or CPS packets.

33. The voice packet processor of claim 31 wherein said voice packet controller is further configured to bypass processing and retransmit said PDUs if said PDUs do not contain voice data.

34. The voice packet processor of claim 31 wherein said voice packet controller is further configured to determine a processing type for each of said PDUs and employ said processing type to queue said PDUs for processing or for bypassing processing to retransmit said PDUs unaltered.

35. The voice packet processor of claim 31 wherein said voice packet parser is further configured to perform CPS packet switching by rerouting said at least one CPS packet to said voice packet assembler for incorporation into an AAL2 transmission stream.

36. The voice packet processor of claim 35 wherein said voice packet parser is further configured to modify the channel identifier of said at least one CPS packet to allow for channel identifier mapping.

37. The voice packet processor of claim 31 wherein said voice packet assembler is further configured to employ a virtual connection timer to transmit said at least one AAL2 cell if a payload of said at least one AAL2 cell is not filled within a set time.

38. The voice packet processor of claim 31 wherein said voice packet processor employs a parser destination ID, an assembler destination ID, or a bypass destination ID to track and route PDUs through said voice packet processor.

39. The voice packet processor of claim 31 further includes a reassembly buffer configured to hold said PDUs for transmission, hold said PDUs for subsequent associated PDUs, and provide a reordering mechanism to ensure said PDUs are processed in an order.

40. The voice packet processor of claim 31 wherein said voice packet parser and said voice packet assembler are further configured to additionally parse and assemble multi-packed AAL2 cells respectively.