Random number's seed generating circuit, driver having the same, and SD memory card system
First Claim
1. A random number'"'"'s seed generating circuit comprising:
- an oscillator which generates a clock; and
a counter which operates in synchronism with the clock, wherein a count value of said counter is output in response to a signal asynchronous with the clock, and the output count value is used as an initial value to generate a random number.
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Accused Products
Abstract
A random number'"'"'s seed is changed without using any nonvolatile memory every time the circuit is activated. An oscillator operates immediately after the power supply is turned on to generate a high-speed clock. A counter operates in accordance with the high-speed clock to change the count value at a high speed. When a sufficient time has elapsed after the power supply is turned, a power-on reset circuit outputs a power-on reset signal indicating that the internal power supply is stabilized. The power-on reset signal is sufficiently slower than the high-speed clock. The timing at which the power-on reset signal is input to a latch circuit varies. Hence, the count value (random number'"'"'s seed) latched by the latch circuit changes every time the power supply is turned on. A random number is generated using the random number'"'"'s seed.
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Citations
76 Claims
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1. A random number'"'"'s seed generating circuit comprising:
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an oscillator which generates a clock; and
a counter which operates in synchronism with the clock, wherein a count value of said counter is output in response to a signal asynchronous with the clock, and the output count value is used as an initial value to generate a random number. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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13. A random number'"'"'s seed generating circuit comprising:
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an oscillator which generates a clock; and
a counter which operates in synchronism with the clock, wherein a timing at which a count value of said counter is output changes at random within a predetermined range in response to a signal, and the output count value is used as an initial value to generate a random number.
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25. A driver comprising:
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a random number'"'"'s seed generating circuit having an oscillator which generates a clock and a counter which operates in synchronism with the clock; and
a random number generating circuit which generates a random number using an initial value generated by said random number'"'"'s seed generating circuit, wherein a count value of said counter is output in response to a signal asynchronous with the clock, the output count value is used as the initial value, and transfer data is kept secret using the random number.
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38. A driver comprising:
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a random number'"'"'s seed generating circuit having an oscillator which generates a clock and a counter which operates in synchronism with the clock; and
a random number generating circuit which generates a random number using an initial value generated by said random number'"'"'s seed generating circuit, wherein a timing at which a count value of said counter is output changes at random within a predetermined range in response to a signal, the output count value is used as the initial value, and transfer data is kept secret using the random number.
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51. An SD memory card system comprising:
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a driver comprising a random number'"'"'s seed generating circuit having an oscillator which generates a clock and a counter which operates in synchronism with the clock, and a random number generating circuit which generates a random number using an initial value generated by said random number'"'"'s seed generating circuit; and
an SD memory card driven by said driver and having a data protecting function, wherein a count value of said counter is output in response to a signal asynchronous with the clock, the output count value is used as the initial value, and transfer data is kept secret using the random number. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63)
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64. An SD memory card system comprising:
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a driver comprising a random number'"'"'s seed generating circuit having an oscillator which generates a clock and a counter which operates in synchronism with the clock, and a random number generating circuit which generates a random number using an initial value generated by said random number'"'"'s seed generating circuit; and
an SD memory card driven by said driver and having a data protecting function, wherein a timing at which a count value of said counter is output changes at random within a predetermined range in response to a signal, the output count value is used as the initial value, and transfer data is kept secret using the random number. - View Dependent Claims (65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76)
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Specification