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Reset facility for redundant processor using a fibre channel loop

  • US 20020129232A1
  • Filed: 03/05/2002
  • Published: 09/12/2002
  • Est. Priority Date: 03/08/2001
  • Status: Active Grant
First Claim
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1. A processor resetting apparatus comprising:

  • a fibre channel arbitrated loop (FC-AL) interface arranged to receive a frame containing an indicator of a reset command for a server including a processor associated with said resetting apparatus; and

    reset means, responsive to said reset command, to issue a reset command for resetting said processor.

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