×

Method and apparatus for improving reliability in microprocessors

  • US 20020144176A1
  • Filed: 03/30/2001
  • Published: 10/03/2002
  • Est. Priority Date: 03/30/2001
  • Status: Active Grant
First Claim
Patent Images

1. An apparatus for detecting errors in a multiple processor system, comprising:

  • at least two processors, each processor including a plurality of pipeline stages for processing the same instructions;

    wherein each pipeline stage includes a parity bit generator, the parity bit generator generating at least one parity bit for each stage; and

    a comparing circuit intercoupled to the processors, the comparing circuit comparing the parity bit of a stage of one processor to the parity bit of the same stage of another processor, and indicating an error when the parity bits are different in value.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×