Control arrangement

• US 20020147874A1
• Filed: 12/28/2001
• Published: 10/10/2002
• Est. Priority Date: 12/29/2000
• Status: Active Grant

• Current Assignee: Henrik Niklasson
• Original Assignee: Henrik Niklasson
• Inventors: Niklasson, Henrik
• Granted Patent: US 7,093,050 B2
• Time in Patent Office: Days
• US Class Current: 710/300
• CPC Class Codes: H04L 12/40013 Details regarding a bus controller
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration
• CPC Class Codes: H04L 2012/40215 Controller Area Network CAN

Abstract

A arrangement for controlling a plurality of controllable devices connected to at least one common bus. The arrangement comprises at least one input member and at least one output member interconnected through said common bus, each input and output member having at least one input terminal and at least one output terminal, respectively. Each input/output terminal has an unique identity, said input member being arranged to receive a control signal from at least one control arrangement connected to said at least one input terminal of said input member. The control signal generates an action signal comprising an address corresponding to an unique identity of an output terminal of said output member connected to at least one of said controllable devices. The action signal is provided on said common bus by said input member to be received by said output member.

Claims

1. An arrangement for controlling a plurality of controllable devices connected to at least one common bus, wherein said arrangement comprises at least one input member and at least one output member interconnected through said common bus, each input and output member having at least one input terminal and at least one output terminal, respectively, each input/output terminal having an unique identity, said input member being arranged to receive a control signal from at least one control arrangement connected to said at least one input terminal of said input member, said control signal generating an action signal comprising an address corresponding to an unique identity of an output terminal of said output member connected to at least one of said controllable devices, whereby said action signal is provided on said common bus by said input member to be received by said output member.

2. The arrangement of claim 1, wherein said common bus is a CAN-bus.

3. The arrangement of claim 1, wherein said input member comprises a control unit, a bus controller, bus driver, memory unit and an input signal controller.

4. The arrangement of claim 3, wherein the controller unit consists of a microprocessor or other data processing arrangement.

5. The arrangement of claim 3, wherein said bus controller is a CAN-bus controller and the bus driver is a CAN-bus driver.

6. The arrangement of claim 1, wherein said output member comprises a control unit, a bus controller, bus driver, memory unit and an output signal controller.

7. The arrangement of claim 6, wherein the controller unit consists of a microprocessor or other data processing arrangement.

8. The arrangement of claim 6, wherein said bus controller is a CAN-bus controller and the bus driver is a CAN-bus driver.

9. The arrangement of claim 1, wherein said at least one input terminal of the input member is so provided that they alter between an input and output terminal state.

10. The arrangement of claim 9, wherein said input/output member comprises a number of input/output terminals and at least one of said input/output terminals is arranged as a common signal terminal.

11. The arrangement of claim 10, wherein said common signal has different states, determining different states for said input terminal.

12. The arrangement of claim 9, wherein each input terminal is connected to a normally open or normally closed switch, which state is determined by programming a control unit.

13. The arrangement of claim 9, wherein said states of said input terminal are determined to bistable or pulse.

14. The arrangement of claim 1, wherein said at least one output terminal is arranged such that it allows tuning a current limitation for said at least one output terminal.

15. The arrangement of claim 1, wherein said input/output members connected to a common power supply line.

16. The arrangement of claim 15, wherein said common power supply line is arranged as a loop.

17. The arrangement of claim 15, wherein said common power supply line is connected to a power supply arrangement at each end.

18. The arrangement of claim 17, wherein said common power supply line is provided with an arrangement for detecting an excess-current.

19. The arrangement of claim 1, wherein said common bus is used to communicate control commands and status messages between said input and output members.

20. The arrangement of claim 1, wherein several input members are connected to switch and indicator groups, which are interconnected by means of a common signal line.

21. A method of controlling a plurality of devices connected to at least one common bus, the method comprising:

arranging at least one input member and at least one output member, each input and output member having at least one input terminal and at least one output terminal each having an unique identity and each input and output member communicating through said common bus,

arranging said input member to receive a control signal from at least one control arrangement connected to said input terminal of said input member,

upon reception of said control signal generating an action signal comprising an address corresponding to an unique identity of said output terminal connected to at least one of said controllable devices,

providing said action signal on said common bus by said input member to be received by said output member connected to at least one of said controllable devices.