Defective pixel correction method and system

• US 20020149683A1
• Filed: 04/11/2001
• Published: 10/17/2002
• Est. Priority Date: 04/11/2001
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Post, William L.
• Granted Patent: US 7,209,168 B2
• Time in Patent Office: Days
• US Class Current: 348/246
• CPC Class Codes: H04N 25/63 applied to dark current

Abstract

A defective pixel detection and correction mechanism for use in an image sensor integrated circuit determines whether a current pixel is a defective pixel in a consistent manner from frame to frame. The defective pixel detection and correction mechanism also replaces defective pixels with stable replacement values. The defective pixel detection and correction mechanism has a defective pixel detection mechanism that employs a look-up table with defective pixel locations for providing a non-varying determination of whether a pixel is defective or non-defective. The defective pixel detection and correction mechanism also has a defective pixel correction mechanism that employs a consistent replacement choice facility to provide a previous pixel value in the same frame, on the same row, and a predetermined number of pixels from the current pixel location as a replacement value and a replacement unit (e.g., multiplexer) for replacing the defective pixel value with the replacement value.

Claims

1. A method for correcting at least one defective pixel comprising:

a) receiving a current pixel location;

b) receiving a defective pixel location;

c) determining whether the current pixel location is a defective pixel location;

d) when the current pixel location is not a defective pixel location, providing a received pixel value as output pixel value; and

e) when the current pixel location is a defective pixel location, providing a previous pixel value as the output pixel value.

2. The method of claim 1 wherein the current pixel location includes a current row and a current column;

wherein the defective pixel location includes a defective pixel row and a defective pixel column;

wherein the step of determining whether the current pixel location is a defective pixel location further comprises;

c_—

1) comparing the current row with the defective pixel row and comparing the current column with the defective pixel column;

c_—

2) determining whether there is a match between the current row and the defective pixel row; and

c_—

3) determining whether there is a match between the current column and the defective pixel column.

3. The method of claim 1 wherein the step of when the current pixel location is not a defective pixel location, providing a received pixel value as an output pixel value further comprises:

d_—

1) receiving a pixel value from an analog to digital converter; and

d_—

2) providing the received pixel value as an output pixel value.

4. The method of claim 1 wherein the step of when the current pixel location is a defective pixel location, providing a previous pixel value as the output pixel value further comprises:

e_—

1) providing a previous pixel value that is in the same frame, in the same row, and a predetermined number of pixels from the current pixel location as the output pixel value.

5. The method of claim 4 wherein the step of providing a previous pixel value that is in the same frame, in the same row, and a predetermined number of pixels from the current pixel location as the output pixel value further comprises:

providing a previous pixel value that has the same color as the current pixel and is two pixels to the left of the current pixel location as the output pixel value.

6. The method of claim 1 wherein the step of when the current pixel location is a defective pixel location, providing a previous pixel value as the output pixel value further comprises:

e_—

1) when the current pixel location is one of the first pixel location and the second pixel location of a row, providing a zero pixel value as the output pixel value.

7. The method of claim 1 wherein the step of when the current pixel location is a defective pixel location, providing a previous pixel value as the output pixel value further comprises:

e_—

1) employing a two step delay circuit to provide a replacement value for the defective current pixel;

wherein the two step delay circuit is reset to zero at the beginning of every row.

8. The method of claim 1 wherein the step of determining whether the current pixel location is a defective pixel location further comprises:

c_—

1) employing a table for storing a plurality of defective pixel locations; and

c_—

2) accessing the table for defective pixel locations;

wherein the defective pixel locations are predetermined; and

wherein the table provides a detection of defective pixels that is consistent from frame to frame; and

wherein artifacts that stem from an inconsistent defective pixel detection are eliminated.

9. The method of claim 8 wherein the step of employing a table for storing a plurality of defective pixel locations includes

storing the defective pixel locations in a sorted order;

wherein a search of the table to determine if a current pixel location is a defective pixel location is obviated.

10. The method of claim 8 wherein the table has a plurality of entries, each entry having a row value and a column value, the plurality of entries including a last entry;

wherein the method is applied to an array of pixels having a first predetermined number of rows and a second predetermined number of columns;

wherein the step of employing a table for storing a plurality of defective pixel locations includes

setting the row value of the last entry in the table to a value that is greater than the first predetermined number of rows; and

setting the column value of the last entry in the table to a value that is greater than the second predetermined number of columns;

wherein hardware to determine if the last entry in the table has been reached is obviated.

11. A circuit for correcting defective pixels in an array having a plurality of pixels comprising:

a defective pixel detection mechanism for providing a determination of whether a pixel is defective that does not vary from frame to frame, the defective pixel detection mechanism having a table for storing a plurality of defective pixel location; and

a defective pixel correction mechanism that replaces a current defective pixel with a previous pixel value from the same frame, on the same row, and a predetermined number of pixels from the current defective pixel;

wherein the defective pixel correction mechanism eliminates artifacts that stem from inconsistent detection of defective pixel from frame to frame.

12. The circuit of claim 11 wherein the defective pixel detection mechanism includes

a match unit for receiving a current pixel location and a defective pixel location, comparing a current pixel location with a defective pixel location, asserting a match signal when there is a match, and de-asserting the match signal when there is no match.

13. The circuit of claim 12 wherein the defective pixel detection mechanism further includes

an index manager coupled to the table and the match unit for receiving the match signal and responsive thereto for managing a table index that points to a current defective pixel location in the table.

14. The circuit of claim 13 wherein the index manager, responsive to an asserted match signal, increments the table index so that the table index points to the next defective pixel location;

and wherein the index manager has an input for receiving a start frame signal and responsive thereto for resetting the table index.

15. The circuit of claim 11 wherein the defective pixel detection mechanism includes

a register coupled to the table for use in writing defective pixel locations to the table and reading defective pixel locations from the table.

16. The circuit of claim 12 wherein the defective pixel correction mechanism further includes

a consistent replacement choice facility for generating a first output;

a source for providing a second output; and

a replacement unit coupled to the consistent replacement choice facility for receiving the first output, to the source for receiving the second output, and to the match unit for receiving the match signal;

the replacement unit for selectively providing a first output and a second output as an output pixel value based on the match signal.

17. The circuit of claim 16 wherein the replacement unit includes a multiplexer;

and

wherein the a consistent replacement choice facility includes a two step delay line having a one back circuit and a two back circuit for providing the first output to the multiplexer;

wherein the one back circuit and a two back circuit each includes an input for receiving a start row signal and responsive thereto for clearing the contents thereof.

18. The circuit of claim 12 wherein the source for providing a second output includes

an analog to digital converter for providing a current pixel value as the second output.

19. The circuit of claim 11 wherein the circuit is couplable to an array of pixels having a first predetermined number of rows and a second predetermined number of columns;

wherein the table includes a plurality of defective pixel locations that are in a sorted order;

wherein a search of the table to determine if a current pixel location is a defective pixel location is obviated;

wherein the table has a plurality of entries, each entry having a row value and a column value, the plurality of entries including a last entry;

wherein the row value of the last entry in the table to a value that is greater than the first predetermined number of rows; and

the column value of the last entry in the table to a value that is greater than the second predetermined number of columns;

wherein hardware to determine if the last entry in the table has been reached is obviated.

20. An image sensor comprising:

(a) a sensor array having a plurality of pixels arranged in rows and columns;

wherein at least one pixel is defective;

(b) a row selector coupled to the sensor array for selecting a row of the sensor array;

(c) a column selector coupled to the sensor array for selecting a column of the sensor array;

(d) a timing controller coupled to the row selector and column selector for providing control signals thereto;

(e) a defective pixel detection mechanism that employs a look-up table with defective pixel locations for providing a determination of whether a pixel is defective or non-defective that does not vary from frame to frame; and

(f) a defective pixel correction mechanism coupled to the defective pixel detection mechanism that employs a consistent replacement choice facility for providing a previous pixel value in the same frame, on the same row, and a predetermined number of pixels from the current pixel location as a replacement value, and a replacement unit for replacing the defective pixel value with the replacement value.