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Semiconductor device having a multilayer interconnection structure

  • US 20020151190A1
  • Filed: 03/26/2002
  • Published: 10/17/2002
  • Est. Priority Date: 03/24/1998
  • Status: Active Grant
First Claim
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1. A method of fabricating a semiconductor device, comprising the steps of:

  • forming an interlayer insulation film on a substrate;

    forming an organic spin-on-glass film on said interlayer insulation film;

    patterning said organic spin-on-glass film and said interlayer insulation film to form a depression such that said depression penetrates through said organic spin-on-glass film and reaches said interlayer insulation film;

    depositing a conductor layer on said organic spin-on-glass film so as to fill said depression; and

    removing a part of said conductor layer locating above said organic spin-on-glass film by a chemical mechanical polishing process, to form a conductor pattern filling said depression, said chemical mechanical polishing process being conducted while using said organic spin-on-glass film as a polishing stopper.

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