Method and apparatus to boot a non-uniform-memory-access (NUMA) machine
First Claim
1. A method for booting a non-uniform-memory-access (NUMA) machine, comprising:
- configuring a plurality of standalone, symmetrical multiprocessing systems to operate within a NUMA system;
assigning a NUMA identification to each of the multiprocessing systems, wherein each identification is unique; and
booting the multiprocessing systems in NUMA mode in one-pass, wherein memory coherency is established at the beginning of the execution of the system firmware.
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Abstract
A method, apparatus and program for booting a non-uniform-memory-access (NUMA) machine are provided. The invention comprises configuring a plurality of standalone, symmetrical multiprocessing (SMP) systems to operate within a NUMA system. A master processor is selected within each SMP; the other processors in the SMP are designated as NUMA slave processors. A NUMA master processor is then chosen from the SMP master processors; the other SMP master processors are designated as NUMA slave processors. A unique NUMA ID is assigned to each SMP that will be part of the NUMA system. The SMPs are then booted in NUMA mode in one-pass with memory coherency established right at the beginning of the execution of the system firmware.
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Citations
16 Claims
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1. A method for booting a non-uniform-memory-access (NUMA) machine, comprising:
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configuring a plurality of standalone, symmetrical multiprocessing systems to operate within a NUMA system;
assigning a NUMA identification to each of the multiprocessing systems, wherein each identification is unique; and
booting the multiprocessing systems in NUMA mode in one-pass, wherein memory coherency is established at the beginning of the execution of the system firmware. - View Dependent Claims (2, 3, 4, 5)
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6. A system for booting a non-uniform-memory-access (NUMA) machine, comprising:
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a plurality of hardware-configuring components which configure a plurality of standalone, symmetrical multiprocessing systems to operate within a NUMA system;
an identification component which assigns a NUMA identification to each of the multiprocessing systems, wherein each identification is unique; and
a booting mechanism which boots the multiprocessing systems in NUMA mode in one-pass, wherein memory coherency is established at the beginning of the execution of the system firmware. - View Dependent Claims (7, 8, 9, 10)
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11. A computer program product in a computer readable medium for use in a data processing system, for booting a non-uniform-memory-access (NUMA) machine, the computer program product comprising:
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instructions for configuring a plurality of standalone, symmetrical multiprocessing systems to operate within a NUMA system;
instructions for assigning a NUMA identification to each of the multiprocessing systems, wherein each identification is unique; and
instructions for booting the multiprocessing systems in NUMA mode in one-pass, wherein memory coherency is established at the beginning of the execution of the system firmware. - View Dependent Claims (12, 13, 14, 15)
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16. A system for booting a non-uniform-memory-access (NUMA) machine, comprising:
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a plurality of hardware-configuring components which configure a plurality of standalone, symmetrical multiprocessing systems to operate within a NUMA system;
a host testing component which configures and tests host processors and memory;
a NUMA testing component which configures and tests NUMA memory;
a software loading mechanism which loads a firmware image into local memory and informs a hardware system console of the firmware version;
a receiving component which receives a confirmation from the hardware system console that the firmware version is the same for all multiprocessing systems in the NUMA system;
an adapter-configuring component which configures NUMA adapters to connect each multiprocessing system to the NUMA system and initializing all host processors;
a releasing mechanism which releases all host processors to execute system firmware;
an identification component which assigns a NUMA identification to each of the multiprocessing systems, wherein each identification is unique;
a plurality of nodal selection mechanisms which select a nodal master processor within each multiprocessing system and designate all other processors within each system as nodal slave processors;
a NUMA selection mechanism which selects a NUMA master processor from among the separate nodal master processors and designates all other nodal master processors as NUMA slave processors;
a switching mechanism which switches the nodal slave processors in each multiprocessing system to a hyper-visor environment in which the nodal slave processors become NUMA slave processors; and
a booting mechanism which boots the multiprocessing systems in NUMA mode in one-pass, wherein memory coherency is established at the beginning of the execution of the system firmware.
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Specification