Semiconductor device
First Claim
1. A semiconductor device comprising:
- a first transistor having a first impurity region connected to a first power source;
a second transistor having a first impurity region connected to a second power source;
a third transistor having a first impurity region connected to the first power source; and
a fourth transistor having a first impurity region connected to the second power source, wherein;
the first to fourth transistors have a same conductivity type;
a second impurity region of the first transistor and a second impurity region of the second transistor are connected to one terminal of a capacitance;
a second impurity region of the third transistor, a second impurity region of the fourth transistor, and a gate electrode of the first transistor are connected to the other terminal of the capacitance;
a gate electrode of the second transistor and a gate electrode of the fourth transistor are connected to an input signal line; and
a gate electrode of the third transistor is connected to the first power source.
1 Assignment
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Accused Products
Abstract
There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node a into a floating state. When the node α is in the floating state, a potential of the node a is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
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Citations
21 Claims
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1. A semiconductor device comprising:
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a first transistor having a first impurity region connected to a first power source;
a second transistor having a first impurity region connected to a second power source;
a third transistor having a first impurity region connected to the first power source; and
a fourth transistor having a first impurity region connected to the second power source, wherein;
the first to fourth transistors have a same conductivity type;
a second impurity region of the first transistor and a second impurity region of the second transistor are connected to one terminal of a capacitance;
a second impurity region of the third transistor, a second impurity region of the fourth transistor, and a gate electrode of the first transistor are connected to the other terminal of the capacitance;
a gate electrode of the second transistor and a gate electrode of the fourth transistor are connected to an input signal line; and
a gate electrode of the third transistor is connected to the first power source. - View Dependent Claims (4, 6, 8, 10, 12, 14, 16, 18)
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2. A semiconductor device comprising:
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a first transistor having a first impurity region connected to a first power source;
a second transistor having a first impurity region connected to a second power source;
a third transistor having a first impurity region connected to the first power source;
a fourth transistor having a first impurity region connected to the second power source, wherein;
the first to fourth transistors have a same conductivity type;
a second impurity region of the first transistor and a second impurity region of the a second transistor are connected to one terminal of a capacitance;
a second impurity region of the third transistor, a second impurity region of the fourth transistor, and a gate electrode of the first transistor are connected to the other terminal of the capacitance;
a gate electrode of the second transistor and a gate electrode of the fourth transistor are connected to a first input signal line; and
a gate electrode of the third transistor is connected to a second input signal line. - View Dependent Claims (3, 5, 7, 9, 11, 13, 15, 17, 19)
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20. A display device having at least one driving circuit, the driving circuit comprising:
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a first transistor having a first impurity region connected to a first power source;
a second transistor having a first impurity region connected to a second power source;
a third transistor having a first impurity region connected to the first power source; and
a fourth transistor having a first impurity region connected to the second power source, wherein;
the first to fourth transistors have a same conductivity type;
a second impurity region of the first transistor and a second impurity region of the second transistor are connected to one terminal of a capacitance;
a second impurity region of the third transistor, a second impurity region of the fourth transistor, and a gate electrode of the first transistor are connected to the other terminal of the capacitance;
a gate electrode of the second transistor and a gate electrode of the fourth transistor are connected to an input signal line; and
a gate electrode of the third transistor is connected to the first power source.
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21. A display device having at least one driving circuit, the driving circuit comprising:
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a first transistor having a first impurity region connected to a first power source;
a second transistor having a first impurity region connected to a second power source;
a third transistor having a first impurity region connected to the first power source;
a fourth transistor having a first impurity region connected to the second power source, wherein;
the first to fourth transistors have a same conductivity type;
a second impurity region of the first transistor and a second impurity region of the second transistor are connected to one terminal of a capacitance;
a second impurity region of the third transistor, a second impurity region of the fourth transistor, and a gate electrode of the first transistor are connected to the other terminal of the capacitance;
a gate electrode of the second transistor and a gate electrode of the fourth transistor are connected to a first input signal line; and
a gate electrode of the third transistor is connected to a second input signal line.
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Specification