OSCILLATING CIRCUIT AND METHOD FOR CALIBRATING SAME
First Claim
1. An oscillating clock circuit, comprising:
- a crystal oscillator generating a crystal oscillation signal;
a controller coupled for receiving the crystal oscillation signal, the controller generating a modified frequency signal from the crystal oscillation signal, the controller further coupled for receiving a synchronization signal, the controller generating a first calibration signal based on comparing the modified frequency signal to the synchronization signal, the controller further generating a second calibration signal based on predicting a frequency of the crystal oscillation signal in response to a physical parameter of the crystal oscillator; and
a synthesizer coupled for receiving the modified frequency signal and calibration signals from the controller, the synthesizer generating a clock signal in response to the modified frequency signal and adjusting the clock signal in response to the calibration signals.
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Abstract
An oscillating circuit (10) includes a quartz crystal oscillator (12) for generating a clock signal (20). The clock signal is synchronized to a master signal (19) during the lock-in periods when the oscillating circuit (10) has access to the master signal (19). During the holdover periods when the oscillating circuit (10) loses access to the master signal (19), an oscillation frequency function predicts the crystal oscillation frequency in terms the physical parameters, e.g., time and temperature, that may affect the crystal oscillation frequency. The predicted frequency is compared with a standard frequency to generate an error signal. In response to the error signal, a fraction handler block (28) determines whether adding cycles to or deleting cycles from the clock signal, thereby calibrating the oscillation signal (13) of the oscillating circuit (10).
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Citations
27 Claims
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1. An oscillating clock circuit, comprising:
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a crystal oscillator generating a crystal oscillation signal;
a controller coupled for receiving the crystal oscillation signal, the controller generating a modified frequency signal from the crystal oscillation signal, the controller further coupled for receiving a synchronization signal, the controller generating a first calibration signal based on comparing the modified frequency signal to the synchronization signal, the controller further generating a second calibration signal based on predicting a frequency of the crystal oscillation signal in response to a physical parameter of the crystal oscillator; and
a synthesizer coupled for receiving the modified frequency signal and calibration signals from the controller, the synthesizer generating a clock signal in response to the modified frequency signal and adjusting the clock signal in response to the calibration signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An oscillating clock circuit, comprising:
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a crystal oscillator generating a crystal oscillation signal;
a controller coupled for receiving the crystal oscillation signal and for predicting a frequency of the crystal oscillation signal in response to a physical parameter of the crystal oscillator. - View Dependent Claims (12, 13, 14, 15, 16, 18, 19, 20)
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17. A method for calibrating an oscillation signal generated by a crystal oscillator, comprising:
predicting a frequency of the oscillation signal based on a physical parameter of the crystal oscillator.
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21. A method for calibrating a clock signal in a base station of a wireless communication network, comprising:
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generating a oscillation signal using a crystal oscillator in the base station;
generating a modified frequency signal by multiplying a frequency of the oscillation signal by a predetermined factor;
receiving a master synchronization signal from a global positioning system satellite;
generating the clock signal by synchronizing the modified frequency signal to the master synchronization signal;
generating a predicted oscillation frequency of the crystal oscillator in terms of a physical parameter of the crystal oscillator during a holdover period in which the base signal loses access to the master synchronization signal;
generating a calibration signal by comparing the predicted oscillation frequency with a standard frequency during the holdover period; and
generating the clock signal during the holdover period by adjusting the modified frequency signal in response to the calibration signal. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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Specification