High speed multi-stage switching network formed from stacked switching layers

• US 20020159449A1
• Filed: 10/09/2001
• Published: 10/31/2002
• Est. Priority Date: 10/06/2000
• Status: Active Grant

• Current Assignee: Nytell Software LLC (Intellectual Ventures LLC)
• Original Assignee: Irvine Sensors Corp.
• Inventors: Carson, John C., Ozguz, Volkan H.
• Granted Patent: US 6,829,237 B2
• Time in Patent Office: Days
• US Class Current: 370/389
• CPC Class Codes: G06T 7/20 Analysis of motion motion estimation for coding, decoding, compressing or decompressing digital video signals H04N19/43, H04N19/51
• CPC Class Codes: G06T 9/004 Predictors, e.g. intraframe, interframe coding
• CPC Class Codes: H04L 45/583 Stackable routers
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/1507 Distribute and route fabrics, e.g. sorting-routing or Batcher-Banyan
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/3018 Input queuing
• CPC Class Codes: H04L 49/3027 Output queuing
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: Y10S 257/93 Thermoelectric, e.g. peltier effect cooling

Abstract

A compact multi-stage switching network (100), and a router (510) incorporating such multi-stage switching network, adapted for simultaneously routing a plurality of data packets from a first plurality of input ports (110) to selected ones of a second plurality of output ports (190) comprising: a first stack (140) of IC switching layers (113) that are stacked in physical contact with one another, each IC switching layer containing at least one switching element circuit (142); a second stack (160) of IC switching layers (113) that are stacked in physical contact with one another, each IC switching layer (113) containing at least one switching element circuit (162); and interconnecting circuitry (150) that connects the first stack (140) of IC layers to the second stack (160) of IC layers to form the compact multi-stage switching network. The stacks (140, 160) are preferably mated to one another in a transverse fashion in order to achieve a natural full-mesh connection. Also contemplated are the use of superconducting IC switching circuits (142) and a suitable superconducting cooling housing (730), as permitted by the compact nature of the multi-stage switching network (100), in order to operate at high speed and low power.

Claims

1. A compact multi-stage switching network adapted for simultaneously routing a plurality of data packets from a first plurality of input ports to selected ones of a second plurality of output ports comprising:

a first stack of IC layers including a plurality of IC switching layers that are stacked in physical contact with one another, each IC switching layer containing at least one switching element circuit;

a second stack of IC layers including a plurality of IC switching layers that are stacked in physical contact with one another , each IC switching layer containing at least one switching element circuit; and

means for interconnecting the first stack of IC layers to the second stack of IC layers to form the compact multi-stage switching network.

2. The compact multi-stage switching network of claim 1 wherein the means for interconnecting comprises a transverse mating between the first stack of IC switching layers and the second stack of IC switching layers.

3. The compact multi-stage switching network of claim 2 wherein the first stack of IC switching layers are stacked horizontally, the second stack of IC switching layers are stacked vertically, and wherein the first and second stacks are bump-bonded to one another.

4. The compact multi-stage switching network of claim 1 wherein the means for interconnecting comprises a common substrate carrying conductive traces, said first and second stacks of IC layers bonded to the common substrate and interconnected with one another via the conductive traces.

5. The compact multi-stage switching network of claim 1 further comprising means for cooling the first and second stacks of IC layers.

6. The compact multi-stage switching network of claim 1 wherein each IC switching layer comprises an IC switching die.

7. The compact multi-stage switching network of claim 1 wherein each IC switching layer comprises a neo-chip layer having an IC switching die embedded in a first dielectric material.

8. The compact multi-stage switching network of claim 1 wherein the switching element circuit of each IC switching layer is a superconducting circuit.

9. The compact multi-stage switching network of claim 8 wherein the superconducting circuit operates at a temperature below 120K.

10. A compact multi-stage switching network adapted for simultaneously routing a plurality of data packets from a first plurality of input ports to selected ones of a second plurality of output ports comprising:

a first stack of layers including a plurality of superconducting switching layers that are stacked in physical contact with one another , each superconducting switching layer containing at least one superconducting switching element circuit;

a second stack of layers including a plurality of superconducting switching layers that are stacked in physical contact with one another , each superconducting switching layer containing at least one superconducting switching element circuit;

means for interconnecting the the first stack of layers to the second stack of layers to form a compact assembly; and

means for cooling the compact assembly to a superconducting temperature.

11. The compact multi-stage switching network of claim 10 wherein the means for interconnecting comprises a transverse mating between the first stack of layers and the second stack of layers.

12. The compact multi-stage switching network of claim 11 wherein the first stack of switching layers are stacked horizontally, the second stack of switching layers are stacked vertically, and wherein the first and second stacks are bump-bonded to one another.

13. The compact multi-stage switching network of claim 10 wherein the means for interconnecting comprises a common substrate carrying conductive traces, said first and second stacks of layers bonded to the common substrate and interconnected with one another via the conductive traces.

14. The compact multi-stage switching network of claim 10 wherein each switching layer comprises a neo-chip layer having an IC switching die of superconducting construction embedded in a first dielectric material.

15. The compact multi-stage switching network of claim 10 wherein the superconducting switching element circuits operate at a temperature below 120K.

17. The packet switching router of claim 16 wherein the means for interconnecting comprises a transverse mating between the first stack of IC switching layers and the second stack of IC switching layers.

18. The packet switching router of claim 17 wherein the first stack of IC switching layers are stacked horizontally, the second stack of IC switching layers are stacked vertically, and wherein the first and second stacks are bump-bonded to one another.

19. The packet switching router of claim 16 wherein the means for interconnecting comprises a common substrate carrying conductive traces, said first and second stacks of IC switching layers bonded to the common substrate with their respective interface conductors communicating via the conductive traces.

20. The packet switching router of claim 16 further comprising means for cooling the first and second stacks of IC layers.

21. The packet switching router of claim 16 wherein each IC switching layer comprises an IC switching die.

22. The packet switching router of claim 16 wherein each IC switching layer comprises a neo-chip layer having an IC switching die embedded in a first dielectric material.

23. The packet switching router of claim 16 wherein the compact multi-stage switching network provides extra switching routes beyond a number necessary to route packet data from line card to line card and further comprising:

a shared resource that is commonly available to the line cards; and

means for controllably connecting a line card to the shared resources through the extra switching routes.

24. The packet switching router of claim 16 wherein each switching layer comprises an IC switching die of superconducting construction and further comprising means for cooling the multi-stage switching network to a superconducting temperature.

25. The compact multi-stage switching network of claim 16 wherein each switching layer comprises a neo-chip layer having an IC switching die of superconducting construction embedded in a first dielectric material.

16. A packet switching router adapted for forwarding data packets comprising:

a plurality of line cards for receiving and transmitting data packets according to a desired protocol over a particular medium, a first line card inspecting destination data in the packet, selecting a desired route, and setting a switch command based on the desired route;

a compact multi-stage switching network having

a first stack of IC layers including a plurality of IC switching layers that are stacked in physical contact with one another , each IC switching layer containing at least one switching element circuit;

a second stack of IC layers including a plurality of IC switching layers that are stacked in physical contact with one another , each IC switching layer containing at least one switching element circuit; and

means for interconnecting the first stack of IC layers to the second stack of IC layers to form the compact multi-stage switching network; and

means for responding to the switch command and routing the data packet through the compact multi-stage switching network to a second line card corresponding to the desired route.

26. A packet switching router comprising:

a plurality of line cards;

compact multi-stage switching network that provides extra switching routes beyond a number necessary to route packet data from line card to line card;

a shared resource that is commonly available to the line cards; and

means for controllably connecting a line card to the shared resources through the extra switching routes.