Systems and methods for decoding data blocks
First Claim
Patent Images
1. A method for decoding data blocks, comprising:
- demodulating a first data transmission transmitted via a first modulation scheme to obtain a first sequence of bits, the first sequence of bits representing a first data block comprising a first payload;
detecting an error associated with the first data block;
storing the first sequence of bits;
demodulating a second data transmission transmitted via a second modulation scheme to obtain a second sequence of bits, the second sequence of bits representing a second data block comprising a second payload, the second payload comprising at least a portion of the first payload;
combining a portion of the first sequence of bits with a portion of the second sequence of bits to obtain a third sequence of bits;
appending an other portion of the first sequence of bits to the third sequence of bits to obtain a fourth sequence of bits; and
decoding the fourth sequence of bits to obtain the first data block.
2 Assignments
0 Petitions
Accused Products
Abstract
Systems and methods for decoding data blocks enable a receiving device to decode a retransmitted data block using previously stored bits. A receiver demodulates a data block transmitted via a first modulation scheme. When the receiver is not able to decode the data block correctly, the transmitter may retransmit the data block as a number of split blocks via a different modulation scheme. The receiver may then combine the bits generated by demodulating the original data block with bits generated by demodulating the retransmitted data block. The receiver then decodes the combined bits.
59 Citations
45 Claims
-
1. A method for decoding data blocks, comprising:
-
demodulating a first data transmission transmitted via a first modulation scheme to obtain a first sequence of bits, the first sequence of bits representing a first data block comprising a first payload;
detecting an error associated with the first data block;
storing the first sequence of bits;
demodulating a second data transmission transmitted via a second modulation scheme to obtain a second sequence of bits, the second sequence of bits representing a second data block comprising a second payload, the second payload comprising at least a portion of the first payload;
combining a portion of the first sequence of bits with a portion of the second sequence of bits to obtain a third sequence of bits;
appending an other portion of the first sequence of bits to the third sequence of bits to obtain a fourth sequence of bits; and
decoding the fourth sequence of bits to obtain the first data block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A device for decoding data blocks, comprising:
-
a receiver that receives data transmissions;
a demodulator coupled to the receiver, the demodulator;
demodulating a first data transmission transmitted via a first modulation scheme to obtain a first sequence of bits, the first sequence of bits representing a first data block comprising a first payload, and demodulating, after the first data transmission, a second data transmission transmitted via a second modulation scheme to obtain a second sequence of bits, the second sequence of bits representing a second data block comprising a second payload, the second payload comprising a portion of the first payload;
an error detector that determines whether an error exists in the first data block;
a memory that stores the first sequence of bits when an error in the first data block is detected;
a combiner that combines a portion of the first sequence of bits with a portion of the second sequence of bits to obtain a third sequence of bits and appends an other portion of the first sequence of bits to the third sequence of bits to obtain a fourth sequence of bits; and
a decoder that decodes the fourth sequence of bits to obtain the first data block. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
-
-
21. A computer-readable medium having stored thereon a plurality of sequences of instructions, said instructions comprising sequences of instructions which, when executed by at least one processor, cause said processor to:
-
demodulate a first data transmission transmitted via a first modulation scheme to obtain a first sequence of bits, the first sequence of bits representing a first data block comprising a first payload;
detect an error associated with the first data block;
store the first sequence of bits;
demodulate a second data transmission transmitted via a second modulation scheme to obtain a second sequence of bits, the second sequence of bits representing a second data block comprising a second payload, the second payload comprising a portion of the first payload;
combine a portion of the first sequence of bits with a portion of the second sequence of bits to obtain a third sequence of bits;
append an other portion of the first sequence of bits to the third sequence of bits to obtain a fourth sequence of bits; and
decode the fourth sequence of bits to obtain the first data block. - View Dependent Claims (22, 23, 25, 26, 27, 28, 29, 30)
-
-
24. A method for decoding data blocks, comprising:
-
demodulating a first data block transmitted via a first modulation scheme to obtain a first set of soft bits associated with the first data block;
detecting an error in the first data block;
transmitting a negative acknowledgement message to a transmitting device;
storing the first set of soft bits;
demodulating a second data block transmitted via a second modulation scheme to obtain a second set of soft bits associated with the second data block;
identifying the second data block as being part of a split data block;
combining a portion of the first set of soft bits with a portion of the second set of soft bits to obtain a first sequence of bits;
appending an other portion of the first set of soft bits to the first sequence of bits to obtain a second sequence of bits; and
decoding the second sequence of bits to obtain the first data block.
-
-
31. A device for decoding data blocks, comprising:
-
a memory for storing soft bits generated by demodulating data blocks; and
a receiver that;
demodulates a first data block transmitted via a first modulation scheme, transmits a negative acknowledgement message to a transmitting device, when an error is detected in the first data block, demodulates a second data block transmitted via a second modulation scheme, identifies the second data block as being part of a split data block, combines a portion of the soft bits associated with the first data block with a portion of the soft bits associated with the second data block to obtain a first sequence of bits, appends an other portion of the soft bits associated with the first data block to the first sequence of bits to obtain a second sequence of bits, and decodes the second sequence of bits to obtain the first data block. - View Dependent Claims (32, 33, 34, 36, 38, 40, 41)
-
-
35. A mobile terminal, comprising:
-
a memory that stores data bits generated by demodulating data blocks; and
a receiver that;
demodulates a first data block comprising a first payload, the first data block transmitted via an eight phase shift keying (8PSK) modulation scheme, detects an error in the first data block, stores a first set of bits associated with the first data block in the memory, transmits a negative acknowledgement message to a transmitting device that transmitted the first data block, when an error is detected, demodulates a second data block transmitted via a Gaussian minimum shift keying (GMSK) modulation scheme to obtain a second set of bits, the second data block comprising a second payload comprising a portion of the first payload, combines a portion of the second set of bits with a portion of the first set of bits to obtain a first sequence of bits, appends an other portion of the first set of bits to the first sequence of bits to obtain a second sequence of bits, and decodes the second sequence of bits to obtain the first data block.
-
-
37. A method for decoding a plurality of data blocks, each of the plurality of data blocks comprising a portion of a payload of a first data block transmitted via a first modulation scheme, the method comprising:
-
demodulating the plurality of data blocks, the plurality of data blocks transmitted via a second modulation scheme;
combining a portion of stored data bits associated with the first data block with one of a plurality of sequences of bits generated by demodulating one of the plurality of data blocks;
appending the remaining portion of the stored data bits to the results of the combining; and
decoding the results of the appending to obtain the first data block.
-
-
39. A method for decoding a plurality of data blocks, each of the plurality of data blocks comprising a portion of a payload of a first data block transmitted via a first modulation scheme, the method comprising:
-
demodulating a first data block transmitted via a first modulation scheme to obtain a first set of soft bits;
demodulating second and third data blocks transmitted via a second modulation scheme to obtain a second and third set of soft bits, respectively;
combining a portion of the first set of soft bits with a portion of each of the second set and third set of soft bits, respectively, to obtain a first sequence of bits; and
performing a bi-directional decoding on the first sequence of bits to obtain the first data block.
-
-
42. A device for decoding data blocks, comprising:
-
a memory that stores first probability information associated with a demodulated first data block;
a MAP decoder that;
receives an input bit sequence corresponding to a second data block, the first and second data blocks being transmitted via different modulation schemes and the second data block comprising a portion of the first data block, and outputs second probability information associated with the second data block using the first probability information; and
a processing device that converts the output from the MAP decoder to a binary sequence of bits representing the first data block. - View Dependent Claims (43)
-
-
44. A method for decoding data blocks, comprising:
-
demodulating a first data block transmitted via a first modulation scheme to obtain a first set of soft bits associated with the first data block, the first data block having a first payload;
detecting an error in the first data block;
storing the first set of soft bits;
demodulating a second data block and a third data block transmitted via a second modulation scheme to obtain a second and a third set of soft bits associated with the second and third data blocks, respectively, the second and third data blocks each comprising a portion of the first payload;
combining a portion of the first set of soft bits with a portion of the second set of soft bits to obtain a fourth set of soft bits;
decoding the fourth set of soft bits to a point corresponding to the beginning of the third data block;
calculating output bits at the point corresponding to the beginning of the third data block for each of a number of surviving states relating to the memory of an encoder that encoded the first data block;
comparing the calculated output bits to output bits generated when the starting state of the encoder for the third data block is known;
modifying the third set of soft bits based on the comparison;
combining the modified third set of soft bits to at least one of a portion of the first or fourth set of the soft bits associated with the second half of the first payload to obtain a fifth set of soft bits; and
decoding the fifth set of soft bits. - View Dependent Claims (45)
-
Specification