Fabrication method of semiconductor integrated circuit device

• US 20020160610A1
• Filed: 03/01/2002
• Published: 10/31/2002
• Est. Priority Date: 04/17/2001
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Kanai, Fumiyuki, Nakabayashi, Shinichi, Tsuchiyama, Hirofumi, Arai, Toshiyuki, Kawai, Ryousei
• Granted Patent: US 6,979,649 B2
• Time in Patent Office: Days
• US Class Current: 438/692
• CPC Class Codes: H01L 21/0206 during, before or after processing of insulating layers
• CPC Class Codes: H01L 21/02068 during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/321 After treatment
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76819 Smoothing of the dielectric planarisation of insulating materials per se H01L21/31051
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/7684 Smoothing; Planarisation
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence

Abstract

A fabrication method of a semiconductor integrated circuit device including polishing the entire area of an edge of a wafer, for example, by using three polishing drums in which a polishing drum polishes the upper surface of the edge of the water relatively, the polishing drum polishes the central portion of the edge of the wafer relatively and a polishing drum polishes the lower surface of the edge of the wafer relatively, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.

Claims

1. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a first insulative film of a single layer or a stacked layer on a surface of a semiconductor wafer;

(b) removing the first insulative film on an edge of the semiconductor wafer;

(c) patterning the first insulative film after the step (b);

(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);

(e) forming a second insulative film on the semiconductor wafer including a portion on the first insulative film after the step (d); and

(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof.

2. A fabrication method of a semiconductor integrated circuit device according to claim 1,

wherein the step (b) is conducted by polishing with a polishing means using a slurry or a grinding wheel.

3. A fabrication method of a semiconductor integrated circuit device according to claim 2, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.

4. A fabrication method of a semiconductor integrated circuit device according to claim 1, wherein the step (b) is conducted by dry etching or wet etching.

5. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a first insulative film of a single layer or a stacked layer on a surface of a semiconductor wafer;

(b) patterning the first insulative film;

(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);

(d) forming a second insulative film on the semiconductor wafer including a portion on the first insulative film after the step (c);

(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof; and

(f) polishing the second insulative film on an edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e).

6. A fabrication method of a semiconductor integrated circuit device according to claim 5,

wherein the step (f) is conducted by polishing with a polishing means using a slurry or a grinding wheel.

7. A fabrication method of a semiconductor integrated circuit device according to claim 6, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.

8. A fabrication method of a semiconductor integrated circuit device according to claim 5, wherein the step (f) is conducted by dry etching or wet etching.

9. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a third insulative film on a surface of a semiconductor wafer;

(b) patterning the third insulative film;

(c) forming a first conductive film over the semiconductor wafer including a portion on the third insulative film;

(d) removing the first conductive film on an edge of the semiconductor wafer after the step (c); and

(e) mechanically or chemically polishing the first conductive film with a surface of the third insulative film on a semiconductor chip obtainable region of the semiconductor wafer being as a polishing end point.

10. A fabrication method of a semiconductor integrated circuit device according to claim 9,

wherein the step (f) is conducted by polishing with a polishing means using a slurry or a grinding wheel.

11. A fabrication method of a semiconductor integrated circuit device according to claim 10, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.

12. A fabrication method of a semiconductor integrated circuit device according to claim 9, wherein the step (d) is conducted by dry etching or wet etching.

13. A fabrication method of a semiconductor integrated circuit device according to claim 9, wherein the third insulative film on the edge of the semiconductor wafer is also removed by a predetermined thickness in the step (d) in a case where the first conductive film is a copper film or a copper alloy film.

15. A fabrication method of a semiconductor integrated circuit device according to claim 14,

wherein the step (e) is conducted by polishing with a polishing means using a slurry or a grinding wheel.

16. A fabrication method of a semiconductor integrated circuit device according to claim 15, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.

17. A fabrication method of a semiconductor integrated circuit device according to claim 14, wherein the step (e) is conducted by dry etching or wet etching.

18. A fabrication method of a semiconductor integrated circuit device according to claim 14, wherein the third insulative film on the edge of the wafer is also removed by predetermined thickness in the step (e) in a case where the first conductive film is a copper film or a copper alloy film.

14. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a third insulative film on a surface of a semiconductor wafer;

(b) patterning the third insulative film;

(c) forming a first conductive film over the semiconductor wafer including a portion on the third insulative film after the step (b);

(d) mechanically or chemically polishing the first conductive film with the surface of the third insulative film on the semiconductor chip obtainable region of the semiconductor wafer being as a polishing end point; and

(e) removing the first conductive film on the edge of the semiconductor wafer after the step (d).

19. A fabrication method of a semiconductor integrated circuit device including steps of:

(a) forming a first conductive film on a semiconductor wafer;

(b) removing the first conductive film on an edge of the semiconductor wafer with a polishing means using a slurry or a abrasive wheel; and

(c) patterning the first conductive film, thereby forming wirings after the step (b).

20. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a first conductive film on a semiconductor wafer;

(b) patterning the first conductive film, thereby forming wirings; and

(c) removing the first conductive film on an edge of the semiconductor wafer with a polishing means using a slurry or an abrasive wheel after the step (b).

21. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a first conductive film on a semiconductor wafer;

(b) patterning the first conductive film, thereby forming first wirings;

(c) forming a fourth insulative film over the semiconductor wafer including a portion on the first wirings;

(d) removing the fourth insulative film on an edge of the semiconductor wafer; and

(e) mechanically and chemically polishing the surface of the fourth insulative film, thereby planarizing the surface thereof after the step (d).

22. A fabrication method of a semiconductor integrated circuit device according to claim 21,

wherein the step (d) is conducted by polishing with a polishing means using a slurry or an abrasive wheel.

23. A fabrication method of a semiconductor integrated circuit device according to claim 22,

wherein the polishing means includes plural polishing drums, each of the plural polishing drums is in contact with the edge of the semiconductor wafer at a region different from each other and the angle of contact thereof changes depending on the shape of the edge of the semiconductor wafer.

24. A fabrication method of a semiconductor integrated circuit device according to claim 21,

wherein the step (d) is conducted by dry etching or wet etching.

26. A fabrication method of a semiconductor integrated circuit device according to claim 25,

wherein the step (e) conducting polishing by a Polishing means using a slurry or an abrasive wheel.

27. A fabrication method of a semiconductor integrated circuit device according to claim 26,

wherein the polishing means includes plural polishing drums, each of the plural polishing drums is in contact with the edge of the semiconductor wafer at a region different from each other and the angle of contact thereof changes depending on the shape of the edge of the semiconductor wafer.

28. A fabrication method of a semiconductor integrated circuit device according to claim 25,

wherein the step (e) is conducted by dry etching or wet etching.

25. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a first conductive film on a semiconductor wafer;

(b) patterning the first conductive film, thereby forming first wirings;

(c) forming a fourth insulative film over the semiconductor wafer including a portion on the first wirings;

(d) mechanically and chemically polishing a surface of the fourth insulative film, thereby planarizing the surface thereof; and

(e) removing the fourth insulative film on the edge of the semiconductor wafer after the step (d).

29. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a single layer or stacked layer of a first insulation film on a surface of a semiconductor wafer;

(b) removing the first insulative film on an edge of the semiconductor wafer;

(c) patterning the insulative film after the step (b);

(d) etching the semiconductor wafer using the first insulative film as a mask after the step (c);

(e) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (d);

(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing surface thereof;

(g) forming a third insulative film over the semiconductor wafer after the step (f);

(h) removing the third insulative film on the edge of the semiconductor wafer; and

(i) mechanically and chemically polishing a surface of the third insulative film, thereby planarizing the surface thereof after the step (h).

30. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a single layer or stacked layer of a first insulation film on a surface of a semiconductor wafer;

(b) removing the first insulative film on an edge of the semiconductor wafer;

(c) patterning the insulative film after the step (b);

(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);

(e) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (d);

(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;

(g) forming a third insulative film over the semiconductor wafer after the step (f);

(h) mechanically and chemically polishing the surface of the third insulative film, thereby planarizing surface thereof; and

(i) removing the third insulative film on the edge of the semiconductor wafer after the step (h).

31. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a single layer or a stacked layer of a first insulative film on a surface of a semiconductor wafer;

(b) patterning the first insulative film;

(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);

(d) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (c);

(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;

(f) polishing the second insulative film on the edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e);

(g) forming a third insulative film over the semiconductor wafer after the step (f);

(h) removing the third insulative film on an edge of the semiconductor wafer; and

(i) mechanically and chemically polishing a surface of the insulative film, thereby planarizing the surface thereof after the step (h).

32. A fabrication method of a semiconductor integrated circuit device comprising the steps of:

(a) forming a single layer or a stacked layer of a first insulative film on a surface of a semiconductor wafer;

(b) patterning the first insulative film;

(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);

(d) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (c);

(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;

(f) polishing the second insulative film on the edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e);

(g) forming a third insulative film over the semiconductor wafer after the step (f);

(h) mechanically and chemically polishing a surface of the third insulative film, thereby planarizing the surface thereof; and

(i) removing the third insulative film on an edge of the semiconductor wafer after the step (h).