Direct conversion receiver architecture
First Claim
1. An automatic gain control (AGC) apparatus comprising:
- an analog variable gain amplifier;
a digital variable gain amplifier coupled to an output of the analog variable gain amplifier; and
a gain controller adapted to measure a signal output from the digital variable gain amplifier and to control the gains of the analog and digital variable gain amplifiers.
2 Assignments
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Accused Products
Abstract
A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
129 Citations
46 Claims
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1. An automatic gain control (AGC) apparatus comprising:
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an analog variable gain amplifier;
a digital variable gain amplifier coupled to an output of the analog variable gain amplifier; and
a gain controller adapted to measure a signal output from the digital variable gain amplifier and to control the gains of the analog and digital variable gain amplifiers. - View Dependent Claims (2)
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3. A method of operating an automatic gain control (AGC) loop in combination with a DC loop, comprising:
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selecting a particular DC operating mode for the DC loop from among a plurality of possible DC operating modes;
operating the DC loop in the selected DC operating mode to correct for DC offset in a desired signal;
selecting a particular AGC operating mode for the AGC loop from among a plurality of possible AGC operating modes based on the selected DC operating mode; and
operating the AGC loop in the selected AGC operating mode to provide variable gain for the desired signal. - View Dependent Claims (4, 5, 6, 7, 8, 9, 10)
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11. A receiver unit in a wireless communication system, comprising:
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a DC loop configurable to operate in one of a plurality of possible DC operating modes to correct for DC offset in a desired signal; and
an automatic gain control (AGC) loop configurable to operate in one of a plurality of possible AGC operating modes to provide variable gain for the desired signal, wherein the particular AGC operating mode to be used is determined based on the particular DC operating mode selected for use for the DC loop. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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12. An control apparatus in a wireless communication system, comprising:
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means for selecting a particular DC operating mode for a DC loop from among a plurality of possible DC operating modes;
means for operating the DC loop in the selected DC operating mode to correct for DC offset in a desired signal;
means for selecting a particular AGC operating mode for an automatic gain control (AGC) loop from among a plurality of possible AGC operating modes based on the selected DC operating mode; and
means for operating the AGC loop in the selected AGC operating mode to provide variable gain for the desired signal.
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13. A method of operating a DC loop in a receiver unit, comprising:
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selecting a particular operating mode for the DC loop from among a plurality of possible operating modes that include an acquisition mode; and
if the selected operating mode is the acquisition mode, operating the DC loop in the acquisition mode for a particular time duration to correct for DC offset in a desired signal, wherein the particular time duration is inversely proportional to a loop bandwidth for the DC loop for the acquisition mode, and transitioning out of the acquisition mode after the particular time duration.
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21. A DC loop in a receiver unit, comprising:
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a summer operative to subtract a DC offset value from a desired signal to provide a DC offset corrected signal; and
a loop control unit configurable to operate in one of a plurality of possible operating modes to provide the DC offset value, wherein the plurality of possible operating modes include an acquisition mode having a particular loop bandwidth, and wherein the loop control unit is operated in the acquisition mode, when selected, for a particular time duration inversely proportional to the loop bandwidth for the acquisition mode and to transition out of the acquisition mode after the particular time duration.
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22. An apparatus in a receiver unit, comprising:
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means for selecting a particular operating mode for a DC loop from among a plurality of possible operating modes that include an acquisition mode; and
means for operating the DC loop in the acquisition mode for a particular time duration, if the selected operating mode is the acquisition mode, to correct for DC offset in a desired signal, wherein the particular time duration is inversely proportional to a loop bandwidth for the DC loop for the acquisition mode, and means for transitioning out of the acquisition mode after the particular time duration. - View Dependent Claims (25, 28, 29, 30, 31, 32)
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23. A method of digitally amplifying a desired signal, comprising:
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receiving a gain represented in a logarithm format;
determining a difference between the received gain and a gain offset;
converting the difference, represented in the logarithm format, to an output gain represented in a linear format; and
digitally multiplying the desired signal with the output gain.
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24. A digital variable gain amplifier (DVGA) comprising:
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a first unit operative to receive a gain represented in a logarithm format and to determine a difference between the received gain and a gain offset;
a second unit operative to convert the difference, represented in the logarithm format, to an output gain represented in a linear format; and
a digital multiplier operative to multiply input samples with the output gain to provide output data.
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26. An apparatus for digitally amplifying a desired signal, comprising:
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means for receiving a gain represented in a logarithm format;
means for determining a difference between the received gain and a gain offset;
means for converting the difference, represented in the logarithm format, to an output gain represented in a linear format; and
means for digitally multiplying the desired signal with the output gain.
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27. A method of controlling one or more analog circuits via a serial bus, comprising:
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receiving a control for a particular analog circuit;
forming a message corresponding to the received control;
sending the message over the serial bus;
receiving the message at the particular analog circuit; and
adjusting one or more characteristics of the particular analog circuit based on the received message.
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33. An apparatus for controlling one or more analog circuits via a serial bus, comprising:
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means for receiving a control for a particular analog circuit;
means for forming a message corresponding to the received control;
means for sending the message over the serial bus;
means for receiving the message at the particular analog circuit; and
means for adjusting one or more characteristics of the particular analog circuit based on the received message. - View Dependent Claims (35, 36, 37, 38, 40, 42, 43)
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34. A receiver unit comprising:
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an RF front-end unit operative to amplify, downconvert, and digitize a received signal to provide samples;
a digital signal processor operative to process the samples to provide output data; and
a serial bus interface (SBI) unit operative to provide controls for the RF front-end unit via a serial bus.
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39. A method of processing a desired signal in a wireless communication system, comprising:
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amplifying the desired signal with a first gain having a coarse resolution;
downconverting the amplified signal from radio frequency (RF) to baseband with a single frequency downconversion stage;
digitizing the downconverted signal to provide samples; and
digitally amplifying the samples with a second gain having a fine resolution to provide output data having a desired signal amplitude.
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41. A direct downconversion receiver comprising:
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an RF front-end unit operative to amplify, downconvert, and digitize a received signal to provide samples;
a digital variable gain amplifier (DVGA) operative to amplify the samples with a first gain to provide output data having a desired signal amplitude; and
an automatic gain control (AGC) loop operative to provide the first gain for the DVGA based in part on the output data.
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44. An apparatus in a wireless communication system, comprising:
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first means for amplifying a received signal;
means for canceling a DC offset in the amplified signal;
second means for digitally amplifying the DC offset cancelled signal; and
means for measuring the digitally amplified signal and to control the gains of the first and second amplifying means.
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45. A receiver unit comprising:
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an analog variable gain amplifier;
a DC offset canceller coupled to an output of the analog variable gain amplifier;
a digital variable gain amplifier coupled to an output of the DC offset canceller;
a gain controller adapted to measure a signal output from the digital variable gain amplifier and to control the gains of the analog and digital variable gain amplifiers; and
a serial bus interface (SBI) unit operative to provide the gain for the analog variable gain amplifier via a serial bus.
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46. A receiver unit comprising:
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an RF front-end unit operative to amplify, downconvert, and digitize a received signal to provide samples;
a DC loop operative to cancel DC offset in the samples;
a digital variable gain amplifier (DVGA) operative to amplify the DC offset canceled samples with a first gain to provide output data having a desired signal amplitude;
an automatic gain control (AGC) loop operative to provide the first gain for the DVGA and a second gain for the RF front-end unit based in part on the output data; and
a serial bus interface (SBI) unit operative to provide the second gain to the RF front-end unit.
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Specification