Method and apparatus for routing data through a computer network

• US 20020161929A1
• Filed: 08/31/2001
• Published: 10/31/2002
• Est. Priority Date: 04/30/2001
• Status: Abandoned Application

• Current Assignee: Captus Networks Corp. (Netsweeper Incorporated)
• Original Assignee: Captus Networks Corp. (Netsweeper Incorporated)
• Inventors: Longerbeam, Donald A., Hall, Kelly M., Hoek, Keith Sr.
• Application Number:
  US09/945,577
• Publication Number:
  US 20020161929A1
• Time in Patent Office: Days
• US Class Current: 709/250
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/583 Stackable routers

Abstract

The present invention relates to an improved method and apparatus for routing data and, more particularly, to a novel backplane for use in a data routing device, the backplane being an active backplane employing a PCI-PCI bridge interface chip and a bus operating at up to 64-bit and 66 MHz frequency. The present invention is also directed to a data routing device employing such a novel passive backplane.

Claims

1. An active backplane board for coupling an external network data path with a single board computer for routing data through a network, comprising:

a. a backplane board substrate having at least two data buses, each data bus comprising a plurality of electrical pathways;

b. a plurality of electronic circuit board expansion slots located on said substrate and in data communication with one of said buses, each slot adapted to receive a network interface card, and couple said network interface card to one of said data buses, and to retain said network interface card spaced apart from but in a plane generally parallel with said backplane board substrate;

c. a means for electrically coupling a first said data bus to a single board computer; and

d. at least one bridge means for electronically coupling said at least two data buses;

wherein said bridge means providing buffering and synchronization of data transferred between said at least two data buses; and

said bridge means having at least a primary port and a secondary port.

2. The active backplane board of claim 1, wherein first said expansion slot being electrically common through first said data bus with the primary port means of said bridge and with the coupling means of said single board computer;

and

a pair of said expansion slots being electrically common with a second said data bus, and said second data bus also being electrically common with said first bridge secondary port means.

3. The active backplane board of claim 2, wherein each said successive pair of slots being electronically coupled to said preceding pair of slots through an associated said bridge means.

4. The active backplane board of claim 3, wherein said bridge means comprises a peripheral component interconnect (PCI)-to-PCI bridge chip.

5. The active backplane board of claim 4, wherein said means for coupling the single board computer comprises a PIC MG standard form connector mounted on an edge of said backplane board.

6. The active backplane board of claim 5, wherein each of said expansion slots comprising a right angle electrical expansion slot extending vertically from said substrate and turning at a right angle to project horizontally for insertion of a PCI compatible card.

7. The active backplane board of claim 6, wherein at least one of said PCI compatible cards is a network interface card.

8. The active backplane board of claim 7, wherein said network interface card is compatible with an Ethernet protocol and is adapted to interface to one or more of the group consisting of:

T-1, OC-*, token ring, ARCNET, V.35, FDDI, ATM, DSL, and ISDN.

9. The active backplane board of claim 8, wherein said bridge chip is capable of operating at up to 66 MHz.

10. The active backplane board of claim 9, wherein said data buses are compatible with 64-bit transmission.

11. The active backplane board of claim 10, wherein said backplane board further comprises an E²PROM memory chip.

12. The active backplane board of claim 11, wherein said E²PROM memory chip is in data communication with a single board computer, said E²PROM memory chip further comprising a means for providing an identifying item to said single board computer, whereupon said single board computer upon receiving said identifying item permits a router employing said backplane board and said single board computer to operate.

13. The active backplane board of claim 12, wherein said identifying item is selected from the group consisting of a hardware serial number associated with said backplane board, a data key, and combinations thereof.

14. The active backplane board of claim 13, wherein said backplane board further comprises an electrical pathway for a plurality of light emitting diodes.

15. The active backplane board of claim 14, wherein said plurality of pathways is of unequal lengths between connections, wherein individual pathways may be shortened without regard to equalization of the bus electrical pathways.

17. The router of claim 16, wherein said backplane board comprises a plurality of network interface card-receiving electronic circuit board expansion slots.

18. The router of claim 17, wherein a portion of said plurality of electronic circuit board expansion slots is populated with a network interface card and a portion of the electronic circuit board expansion slots is not populated with a network interface card.

19. The router of claim 18, wherein said backplane board comprises three network interface card-receiving electronic circuit board expansion slots.

20. The router of claim 19, wherein the group of electronic circuit board expansion slots populated with a network interface card is selected from the group consisting of one, two and three of said electronic circuit board expansion slots.

21. The router of claim 20, wherein said data communication ports are selected from the group consisting of 10/100 megabit ports, one gigabit ports, and combinations thereof.

22. The router of claim 21, wherein each of said network interface cards includes four data communications ports, and each of said data communications ports is 10/100 megabit ports.

23. The router of claim 21, wherein said means for providing data communication between said backplane board and said single board computer is a PCI Industrial Computer Manufacturing Group PIC MG connector.

24. The router of claim 23, wherein said backplane board further comprises at least one E²PROM memory chip.

25. The router of claim 24, wherein said E²PROM memory chip is in data communication with said single board computer, said E²PROM memory chip further comprises a means for providing an identifying item to said single board computer, whereupon said single board computer upon receiving said identifying item permits a router employing said backplane board and said single board computer to operate.

26. The router of claim 25, wherein said identifying item is selected from the group consisting of a hardware serial number associated with said backplane board, a data key, and combinations thereof.

27. The router of claim 23, wherein an item selected from the group consisting of said housing, said backplane board, and combinations thereof further comprises a plurality of light emitting diodes.

28. The router of claim 27, also comprising a second plurality of light emitting diodes is adapted to provide a visual indication of the real time network utilization rate of said backplane board.

29. The router of claim 28, wherein during operation in a high availability mode, at least a portion of said light emitting diodes displays said network utilization rate, and a portion of said light emitting diodes displays high availability heartbeats in blinks per unit of time.

30. The router of claim 23, wherein said data communications ports are horizontally aligned along the same line of axis and are sequentially numbered such that when a plurality of ports is present, the ports are sequentially identified from one end of the aligned ports to the other, wherein port one is the first and left-most port, the second left-most port is port two, and the remaining ports are sequentially numbered in increasing numerical sequence proceeding to the right-most port.

31. The router of claim 23 further comprising an operating system associated with the single board computer.

32. The router of claim 31, wherein said memory storage means comprises a solid state static memory disk.

33. The router of claim 32 further comprising a means for configuring said operating system.

34. The router of claim 33, wherein said means is selected from the group consisting of a computer keyboard and interface, computer monitors and interface, serial data communications ports, parallel data communications ports, computer terminals, and combinations thereof.

35. The router of claim 23 further comprising a plurality of cooling fans retained within said housing.

36. The router of claim 35, wherein said cooling fans are powered by one or more power takeoffs from said power distribution board, at least a portion of said power takeoffs further comprising a polyfuse.

37. The router of claim 23, wherein said router being adapted to operate with a peripheral computer interface bus supporting up to 64-bits and 66-megahertz clock speed.

38. The router of claim 23, wherein said memory storage means includes a computer executable software program for adaptive firewall protection.

39. The router of claim 38 further comprising a computer executable software program for denial of service protection.

16. A router device having an active backplane, comprising:

a. a housing having a removable access panel, including ventilation means and power distribution means;

b. a plurality of data communication ports accessible externally of said housing, said ports residing on and in data communication with at least one network interface card;

c. a single board computer;

d. memory storage means; and

e. an active backplane board interposed between said network interface card and said single board computer, said backplane board providing data communication between said network interface card and said single board computer, said backplane board comprising a backplane board substrate having at least two data buses, each data bus comprising a plurality of electrical pathways;

a plurality of electronic circuit board expansion slots located on said substrate and in data communication with one of said buses, each slot adapted to receive a network interface card, and couple said network interface card to one of said data buses, and to retain said network interface card spaced apart from but in a plane generally parallel with said backplane board substrate;

means for electrically coupling a first said data bus to a single board computer; and

at least one bridge means for electronically coupling said at least two data buses, said bridge means providing buffering and synchronization of data transferred between said at least two data buses;

said bridge means having at least a primary port and a secondary port;

wherein said network interface card is retained within said network interface card-receiving electronic circuit board expansion slot in a spaced apart but generally parallel plane with said backplane board substrate and wherein said router housing is approximately one rack unit in height.

40. An improved method for routing data through a network comprising the following steps:

a. providing an active backplane board for coupling an external network data path with an SBC programmed to route data through a network;

b. providing at least two data buses, each data bus made up of a plurality of electrical pathways on the backplane, with a plurality of electronic circuit board expansion slots located on the backplane substrate, in data communication with one of the buses;

c. adapting each slot to receive a network interface card, and coupling the NIC to one of the data buses while at the same time retaining said NIC in a spaced apart relation from, but in a plane generally parallel with the backplane board substrate;

d. providing a means for electrically coupling a first said data bus to a single board computer; and

e. providing at least one bridge means for electronically coupling said the two (or more, if applicable) data buses;

with said bridge means providing buffering and synchronization of data transferred between said at least two data buses;

with the PCI bridge means having at least a primary port and a secondary port for bi-directional communications with the SBC.

41. The method of claim 40, also comprising the steps of:

a. adapting the bridge means for communication according to an industry standard PCI protocol for 64-bit/66 MHz communication to and from an SBC;

b. adapting each of said expansion slots for a right angle electrical connection slot expansion slot extending vertically from said substrate and turning at a right angle to project horizontally for and inserting therein a PCI compatible card, such as an NIC, with the NIC being adapted to interface to T-1, OC-*, token ring, ARCNET, V.35, FDDI, ATM, DSL, or ISDN; and

c. integrating within the operating system for routing data, intelligent, adaptive firewall system, intrusion detection system, or network load balancing system or any combination thereof.