Metalized dielectric substrates for EAS tags

• US 20020163434A1
• Filed: 05/02/2002
• Published: 11/07/2002
• Est. Priority Date: 05/04/2001
• Status: Active Grant

• Current Assignee: Massachusetts Development Finance Agency (STATE OF MASSACHUSETTS)
• Original Assignee: Massachusetts Development Finance Agency (STATE OF MASSACHUSETTS)
• Inventors: Burke, Thomas F.
• Granted Patent: US 6,835,412 B2
• Time in Patent Office: Days
• US Class Current: 340/572.7
• CPC Class Codes: G08B 13/2414 using inductive tags
• CPC Class Codes: G08B 13/242 Tag deactivation
• CPC Class Codes: G08B 13/2431 Tag circuit details
• CPC Class Codes: G08B 13/2437 Tag layered structure, processes for making layered tags
• CPC Class Codes: G08B 13/2442 Tag materials and material properties thereof, e.g. magnetic material details

Abstract

The invention features a metalized substrate of a thin inorganic or polymeric dielectric material clad on both sides with metal and the advantages obtained by fabricating such a substrate material into a tuned or resonant circuit tag, generally defined by at least one inductive and capacitive element arranged in series. The thin layer of dielectric material contains a very small opening or via hole therethrough and is formed directly on a first layer of conductive foil. A second layer of very thin conductive metal is deposited on the dielectric layer and in the via hole to effect the interconnection of the two conductive layers. This substrate construction is subsequently patterned with an etch resist, and then etched to form the inductor and capacitor plates that constitute the elements of the resonant circuit. The deactivation reliability of tag circuits made from this construction is enhanced by the uniformity and consistency with which the critical breakdown thickness of its dielectric layer is formed by non-mechanical means. The formation of the small via hole in the dielectric layer has a derivative benefit in that it also eliminates the need to devote tag surface area on the inductor side to the formation of a mechanical interconnect. The very thin dielectric layer also permits a very small capacitor plate to be employed which maximizes the available surface area and hence the number of coil turns that can be devoted to the layout of the inductor pattern, thereby enhancing the inductance which can be exploited to increase the detection range of a given size tag or to produce smaller tags with the same detection range.

Claims

1. A metalized dielectric substrate comprising:

a flexible substantially planar inorganic dielectric substrate having a thickness of less than 5000 Å and

a first side and a second side;

a first conductive layer on said first side of said dielectric substrate wherein said first conductive layer is at least 10 microns thick; and

a second conductive layer on said second side of said dielectric substrate.

2. The metalized substrate of claim 1 wherein there is at least one conductive element connecting said second conductive layer to said first conductive layer.

3. The metalized substrate of claim 1 wherein the planar inorganic dielectric is alumina.

4. The metalized substrate of claim 2 wherein the planar inorganic dielectric is alumina.

5. The metalized substrate of claim 1 wherein the first conductive layer is aluminum or aluminized copper and the second conductive layer is copper or aluminum.

6. The metalized substrate of claim 2 wherein the first conductive layer is aluminum or aluminized copper and the second conductive layer is copper or aluminum.

7. The metalized substrate of claim 1 wherein the first conductive layer has an aluminum surface and wherein the dielectric substrate is an anodized layer on the first conductive layer.

8. The metalized substrate of claim 1 wherein the first conductive layer is aluminum or aluminized copper and wherein the dielectric substrate is an anodized layer on the first conductive layer.

9. The metalized substrate of claim 1 wherein the dielectric substrate is a sputtered layer on the first conductive layer.

10. The metalized substrate of claim 2 wherein the conductive element is a via hole through the dielectric substrate and containing material of the second conductive layer.

11. A resonant tag circuit for use as an electronic article surveillance tag, comprising:

a flexible substantially planar inorganic dielectric substrate having a thickness of less than 5000 Å and

a first side and a second side;

a conductive layer applied to said first side of said dielectric substrate wherein said conductive layer is at least 10 microns thick and a conductive layer applied to said second side of said dielectric substrate;

a first conductive pattern positioned on said first side of said dielectric substrate wherein said conductive pattern comprises an inductor and a capacitor plate;

a second conductive pattern positioned on said second side of said dielectric substrate wherein said conductive pattern comprises a capacitor plate in registration with said capacitor plate on said first side of said dielectric substrate;

a conductive element connecting said second conductive pattern to said first conductive pattern to form a series inductor-capacitor resonant circuit.

12. The resonant tag circuit of claim 11 wherein the dielectric substrate is alumina, the conductive layer applied to the first side of the dielectric substrate is aluminum foil or aluminized copper foil and the conductive layer applied to the second side of the dielectric substrate is aluminum or copper.

13. The resonant tag circuit of claim 11 wherein the dielectric substrate is a composite of two or more layers of different inorganic materials.

14. The resonant tag circuit of claim 12 wherein the dielectric substrate is a composite of two or more layers of different inorganic materials.

15. The resonant tag circuit of claim 11 wherein multiple inductor and capacitor plate patterns are positioned on said first side of said dielectric and corresponding multiple capacitor plates are positioned in registration on said second side of said dielectric substrate.

16. The resonant tag circuit of claim 15 wherein one or more integrated circuit chips and other electronic components are electrically connected to the circuit patterns formed on either side of said dielectric.

18. The metalized substrate of claim 17 wherein there is at least one conductive element connecting said second conductive layer to said first conductive layer.

19. The metalized substrates of claim 17 wherein the planar polymeric dielectric material is selected from the group consisting of polystyrene;

polyethylene;

polypropylene;

their co-copolymers;

or a fluoropolymer.

20. The metalized substrates of claim 18 wherein the planar polymeric dielectric material is selected from the group consisting of polystyrene;

polyethylene;

polypropylene;

their co-copolymers;

or a fluoropolymer.

21. The metalized substrate of claim 17 wherein the first conductive layer is aluminum or copper and the second conductive layer is aluminum or copper.

22. The metalized substrate of claim 19 wherein the first conductive layer is aluminum or copper and the second conductive layer is aluminum or copper.

24. The resonant tag circuit of claim 23 wherein the dielectric substrate material is polystyrene, the conductive layer applied to the first side of the dielectric substrate is aluminum or copper foil and the conductive layer applied to the second side of the dielectric substrate is copper or aluminum.

25. The resonant tag circuit of claim 23 wherein the dielectric substrate material is selected from the group consisting of polyethylene, polypropylene, one of their copolymers, or a fluoropolymer.

26. The resonant tag circuit of claim 23 wherein the conductive layer applied to the second side of the dielectric substrate is a conductive polymer.

27. The resonant tag circuit of claim 23 wherein multiple inductor and capacitor plate patterns are positioned on said first side of said dielectric, corresponding multiple capacitor plates are positioned in registration on said second side of said dielectric substrate.

28. The resonant tag circuit of claim 23 wherein one or more integrated circuit chips and other electronic components are electrically connected to the circuit patterns formed on either side of said dielectric.

29. The resonant tag circuit of claim 27 wherein one or more integrated circuit chips and other electronic components are electrically connected to the circuit patterns formed on either side of said dielectric.

17. A metalized dielectric substrate comprising:

a flexible substantially planar polymeric dielectric substrate having a thickness of less than 15 microns and a first side and a second side;

a first conductive layer on said first side of said dielectric substrate wherein said first conductive layer is at least 10 microns thick; and

a second conductive layer on said second side of said dielectric substrate.

23. A resonant tag circuit for use as an electronic article surveillance tag, comprising:

a flexible substantially planar polymeric dielectric substrate having a thickness of less than 15 microns and a first side and a second side;

a conductive layer applied to said first side of said dielectric substrate wherein said conductive layer is at least 10 microns thick and a conductive layer applied to said second side of said dielectric substrate;

a first conductive pattern positioned on said first side of said dielectric substrate wherein said conductive pattern comprises an inductor and a capacitor plate;

a second conductive pattern positioned on said second side of said dielectric substrate wherein said conductive pattern comprises a capacitor plate in registration with said capacitor plate on said first side of said dielectric substrate;

a conductive element connecting said second conductive pattern to said first conductive pattern to form a series inductor-capacitor resonant circuit.