Caching for I/O virtual address translation and validation using device drivers

• US 20020166038A1
• Filed: 02/20/2001
• Published: 11/07/2002
• Est. Priority Date: 02/20/2001
• Status: Active Grant

• Current Assignee: Stratus Technologies Ireland Ltd. (Stratus Technologies Bermuda Holdings Ltd.)
• Original Assignee: Stratus Technologies Bermuda Ltd. (Stratus Technologies Bermuda Holdings Ltd.)
• Inventors: MacLeod, John R.
• Granted Patent: US 6,886,171 B2
• Time in Patent Office: Days
• US Class Current: 711/202
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Abstract

A method and apparatus for input/output virtual address translation and validation assigns a range of memory to a device driver for its exclusive use. The device driver invokes system functionality for receiving a logical address and outputting a physical address having a length greater than the logical address. Another feature of the invention is a computer system providing input/output virtual address translation and validation for at least one peripheral device. In one embodiment, the computer system includes a scatter-gather table, an input/output virtual address cache memory associated with at least one peripheral device, and at least one device driver. In a further embodiment, the input/output virtual address cache memory includes an address validation cache and an address translation cache.

Claims

1. In a computer system that implements input/output virtual address translation and validation, a method for input/output virtual address translation and validation comprising the steps of:

(a) assigning a range of memory to a device driver for its exclusive use, the device driver associated with a peripheral device; and

(b) invoking, by the device driver system functionality for receiving a logical address and outputting a physical address, the physical address having a length greater than the logical address.

2. The method of claim 1 further comprising the step of assigning, by the device driver, a bus slot number to the peripheral device.

3. The method of claim 1 further comprising the step of initializing the computer.

4. The method of claim 3 further comprising the step of disabling input/output virtual address translation.

5. The method of claim 3 further comprising the step of assigning a range of memory to at least one attached peripheral device.

6. The method of claim 5 wherein the assigning further comprises the step of assigning a range of memory that is not physically contiguous to any other memory.

7. The method of claim 3 further comprising the step of reading at least one parameter from memory.

8. The method of claim 7 further comprising the step of allocating memory for at least one scatter-gather table based on the at least one parameter.

9. The method of claim 8 wherein the allocation is only performed if the at least one parameter is at least one of a set of predetermined valid table sizes.

10. The method of claim 8 wherein the at least one parameter further comprises a default table size.

11. The method of claim 8 further comprising the step of allocating memory for at least one input/output virtual address cache register and at least one enable register, both associated with the peripheral device.

12. The method of claim 3 further comprising the step of checking for valid peripheral device to peripheral device bridges.

13. The method of claim 3 further comprising the step of logging errors.

14. The method of claim 1 wherein step (b) comprises the step:

(b-a) if this is the first time the device driver is invoking the functionality, then enabling input/output virtual address translation and verification.

15. The method of claim 1 further comprising the step of mapping an address range in response to a driver request.

16. The method of claim 1 further comprising the step of freeing an address range in response to a driver request.

17. The method of claim 1 further comprising the step of invoking, by the device driver, system functionality to change a scatter-gather table.

18. The method of claim 17 further comprising the step of entering an address-range mapping into the scatter-gather table.

19. The method of claim 18 further comprising the step of returning the mapping to the peripheral device to use for memory transactions.

20. The method of claim 19 further comprising determining that a transaction is complete.

21. The method of claim 19 further comprising invalidating an entry in the scatter-gather table.

22. The method of claim 19 further comprising clearing an entry in an input-output virtual address cache.

23. The method of claim 1 further comprising the step of invoking the system functionality by the device driver to disable the input/output virtual address translation and validation.

24. The method of claim 23 further comprising the step of invalidating the appropriate entries in memory when no devices are using input/output virtual address translation and verification.

25. The method of claim 23 further comprising decrementing a counter until no devices are using input/output virtual address translation.