Semiconductor device and method for manufacturing the same

• US 20020167046A1
• Filed: 06/20/2002
• Published: 11/14/2002
• Est. Priority Date: 01/14/2000
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Tsuzuki, Yukio, Aoki, Takaaki, Arakawa, Takafumi, Kuroyanagi, Akira, Suzuki, Mikimasa, Soga, Hajime, Tomatsu, Yutaka
• Granted Patent: US 6,864,532 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/28211 in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer H01L21/28194 and H01L21/28202 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/511 with a compositional variation, e.g. multilayer structures H01L29/516 takes precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film includes a first portion located on a wall of the trench and a second portion located on upper and bottom portions of the trench. The first portion includes a first oxide film, a nitride film, and a second oxide film. The second portion includes only an oxide film and is thicker than the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be reduced to improve the withstand voltage. In addition, and end of the trench may have an insulation layer that is thicker than the first portion.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate having a trench formed on a main surface thereof; and

an insulating film disposed on an inner wall of the trench, the insulating film having a first portion composed of a first oxide film, a nitride film, and a second oxide film, and a second portion consisting of an oxide film, wherein;

one of the first portion and the second portion of the insulating film is disposed on a side wall of the trench; and

another one of the first portion and the second portion of the insulating film is disposed on at least one of an upper portion and a bottom portion of the trench.

2. The semiconductor device according to claim 1, wherein:

the first portion is disposed on the side wall of the trench; and

the second portion is disposed on at least one of the upper portion and the lower portion of the trench and has a thickness larger than that of the first portion.

3. The semiconductor device according to claim 2, wherein the second portion is disposed on both the upper portion and the bottom portion of the trench with the thickness larger than that of the first portion.

4. The semiconductor device according to claim 2, wherein:

the semiconductor substrate is composed of a first conductivity type first semiconductor layer, a second conductivity type second semiconductor layer, and a first conductivity type third semiconductor layer;

the trench is formed from a main surface side of the semiconductor substrate, and penetrates the first semiconductor layer and the second semiconductor layer to reach the third semiconductor layer;

the semiconductor substrate provides a transistor therein using the second semiconductor layer as a channel region, and the insulating film as a gate insulating film; and

the nitride film of the first portion of the insulating film has an upper end at the main surface side that is located at a position closer to the main surface than a boundary between the first semiconductor layer and the second semiconductor layer.

5. The semiconductor device according to claim 2, wherein:

the oxide film of the second portion is formed by thermal oxidation that is performed for forming the second oxide film of the first portion after the first oxide film and the nitride film are formed on the side wall and on at least the one of the upper portion and the bottom portion, and after the nitride film on the one of the upper portion and the bottom portion is removed.

6. The semiconductor device according to claim 1, wherein:

the first portion of the insulating film is disposed on the bottom portion of the trench; and

the second portion of the insulating film is disposed on the side wall of the trench.

7. The semiconductor device according to claim 6, wherein:

the semiconductor substrate is composed of a first conductivity type first semiconductor layer, a second conductivity type second semiconductor layer, and a first conductivity type third semiconductor layer;

the trench is formed from a main surface side of the semiconductor substrate, and penetrates the first semiconductor layer and the second semiconductor layer to reach the third semiconductor layer; and

the nitride film of the first portion of the insulating film has an upper end at the main surface side that is located at a position, a distance of which from the main surface is larger than that of a boundary between the second semiconductor layer and the third semiconductor layer.

8. A trench-gate type transistor, comprising:

a semiconductor substrate having a trench formed thereon; and

a gate insulating film disposed on an inner wall of the trench, the gate insulating film including a first portion and a second portion respectively locally disposed on the inner wall of the trench and having different structures from each other, the first portion being composed of a first oxide film, a nitride film, and a second oxide film which are layered.

9. The trench-gate type transistor according to claim 8, wherein a first region of the inner wall where the first portion of the gate insulating film is disposed includes a side wall portion of the trench in which a channel region is provided, and the first region excludes a bottom portion of the trench.

10. The trench-gate type transistor according to claim 9, wherein the first region excludes an opening portion of the trench.

11. The trench-gate type transistor according to claim 9, wherein a second region of the inner wall where the second portion of the gate insulating film is disposed includes at least one of an opening portion and the bottom portion of the trench.

12. The trench-gate type transistor according to claim 11, wherein the second portion of the insulating film disposed on the one of the opening portion and the bottom portion of the trench has a thickness thicker than that of the first portion disposed on the side wall portion of the trench.

13. The trench-gate type transistor according to claim 8, wherein:

the first portion of the gate insulating film is disposed on a bottom portion of the trench; and

the second portion consists of an oxide film and is disposed on a side wall portion of the trench.

14. The trench-gate type transistor according to claim 8, wherein the second portion consists of an oxide film.

16. The trench-gate type transistor according to claim 15, wherein:

the first portion of the gate insulating film is disposed on a side wall portion of the trench; and

the second portion of the gate insulating film is disposed at least on an opening portion and a bottom portion of the trench, and has a thickness larger than that of the first portion.

17. The trench-gate type transistor according to claim 15, wherein the first portion of the gate insulating film is disposed on only a bottom portion of the trench.

19. The method according to claim 18, wherein:

the first region is at least one of an opening portion and a bottom portion of the inner wall; and

the second region is a side wall portion of the inner wall.

20. The method according to claim 19, wherein the second oxide film is formed so that a total thickness of the first oxide film and the second oxide film disposed on the first region is thicker than a total thickness of the first oxide film, the nitride film, and the second oxide film disposed on the second region.

21. The method according to claim 18, wherein:

the first region on which only the first oxide film and the second oxide film are disposed is a side wall portion of the inner wall; and

the second region on which the first oxide film, the nitride film, and the second oxide film are disposed is a bottom portion of the inner wall.

15. A trench-gate type transistor, comprising:

a semiconductor substrate having a trench formed thereon; and

a gate insulating film disposed on an inner wall of the trench, the gate insulating film including a first portion and a second portion respectively located on first and second regions of the inner wall, the first portion being composed of a plurality of insulating films, the second portion being composed of only a single insulating film.

18. A method for manufacturing a semiconductor device, comprising:

preparing a semiconductor substrate having a trench formed thereon;

forming a first oxide film on an inner wall of the trench;

forming a nitride film on the first oxide film;

partially removing the nitride film so that the first oxide film is exposed at a first region of the inner wall and so that the nitride film remains on the first oxide film at a second region of the inner wall;

forming a second oxide film, by thermal oxidation, on the first oxide film at the first region and on the nitride film at the second region.

22. A method for manufacturing a trench-gate type transistor, comprising:

preparing a semiconductor substrate composed of a first conductivity type first semiconductor layer, a second conductivity type second semiconductor layer, and a first conductivity type third semiconductor layer;

forming a trench on the semiconductor substrate from a main surface of the semiconductor substrate at a side of the first semiconductor layer, the trench penetrating the first semiconductor layer and the second semiconductor layer to reach the third semiconductor layer;

forming a gate insulating film on an inner wall of the trench by forming a first oxide film on the inner wall of the trench;

forming a nitride film on the first oxide film;

removing a part of the nitride film to expose a part of the first oxide film; and

forming a second oxide film on the nitride film and on the part of the first oxide film; and

forming a gate electrode in the trench.

23. The method according to claim 22, wherein:

when the gate insulating film is formed, the nitride film is partially removed to have an end portion at a side of the main surface of the semiconductor substrate, the end portion defining a distance from the main surface that is smaller than that of a boundary between the first semiconductor layer and the second semiconductor layer.

24. The method according to claim 22, wherein:

when the gate insulating film is formed, the nitride film is partially removed to remain only on a bottom portion of the trench and to have an end portion at a side of the main surface of the semiconductor substrate, the end portion defining a distance from the main surface that is larger than that of a boundary between the second semiconductor layer and the third semiconductor layer.

25. The method according to claim 22, wherein:

the second oxide film is formed on the nitride film at a first region of the inner wall and on the part of the first oxide film at a second region of the inner wall so that a total thickness of the gate insulating film at the second region is thicker than that at the first region.

26. The method according to claim 25, wherein:

the first region includes a side wall portion of the inner wall; and

the second region includes at least one of an opening portion and a bottom portion of the trench.

28. The method according to claim 27, wherein the oxidation preventive film is a nitride film.

29. The method according to claim 27, wherein:

the oxidation preventive film is disposed on a side wall portion of the inner wall;

the gate insulating film disposed on the side wall portion is composed of the first oxide film, the oxidation preventive film, and the second oxide film; and

the gate insulating film disposed on at least one of an opening portion and a bottom portion of the trench is composed of only the first oxide film and the second oxide film.

30. The method according to claim 27, wherein the oxidation preventive film is disposed only on a bottom portion of the trench.

27. A method for manufacturing a trench-gate type transistor, comprising:

a semiconductor substrate having a trench thereon; and

forming a gate insulating film on an inner wall of the trench, wherein the formation of the gate insulating film is comprising;

forming a first oxide film on the inner wall of the trench;

locally disposing an oxidation preventive film on the first oxide film; and

forming a second oxide film by thermal oxidation on the first oxide film with the oxidation preventive film locally interposed therebetween.

31. A semiconductor device comprising:

a semiconductor substrate having a surface, in which a trench is formed;

a heavily doped region, which is formed in a sidewall of a trench surface at a longitudinal end of the trench, and which is heavily doped with an impurity to increase oxidization speed of the heavily doped region;

a stack of films, which is formed on the sidewall, and which includes;

a first silicon oxide film, wherein the first silicon oxide film is thicker at the longitudinal end than that the rest of the first silicon oxide film;

a silicon nitride film; and

a second silicon oxide film, and

a gate electrode formed on the stack of films.

33. The semiconductor device as in claim 31 or claim 32, wherein the device includes at least one of an entrance silicon oxide film, which is thicker than the stack, and which is located at an entrance of the trench, and a bottom entrance film, which is thicker than the stack, and which is located at a bottom of the trench.

34. The semiconductor device as in claim 33, wherein:

the substrate includes;

a source region, which is a first conduction type;

a base region, which is a second conduction type; and

a drift region, which is the first conduction type, wherein the source region, the base region, and the drift region are located in this order from the surface;

the trench extends perpendicularly from the surface to the drift region through the source region and the base region; and

a channel region is generated in the base region adjacent to the trench.

35. The semiconductor device as in claim 34, wherein:

the source region includes;

a first region, which has a predetermined impurity concentration and a predetermined depth; and

a second region, which has an impurity concentration lower than the first region and a depth larger than the first region; and

the second region separates the first region from the trench.

39. The method as in claim 37 or claim 38, the method further comprising steps of:

forming a drift region, which is a first conduction type;

forming a base region, which is a second conduction type;

forming a source region, which is a first conduction type, by forming a first region, which has a predetermined impurity concentration and a predetermined depth, and a second region, which has an impurity concentration lower than the first region and a depth larger than the first region; and

forming the trench, which extends perpendicularly from the surface of the substrate to the drift region through the source region and the base region, such that the second region separates the first region from the trench.

40. The method as in claim 37 or claim 38, the method further comprising a step of removing the silicon nitride film from at least one of an entrance and a bottom of the trench to form a silicon oxide film thicker than the stack.

32. A semiconductor device comprising:

a semiconductor substrate having a surface, in which a trench is formed;

a stack of films, which is formed on a sidewall of a trench surface, and which includes;

a first silicon oxide film;

a silicon nitride film; and

a second silicon oxide film, wherein the stack includes only the first and second silicon oxide films on the sidewall at a longitudinal end of the trench, and wherein the stack is thicker at a longitudinal end than the rest of the stack, and

a gate electrode formed on the stack of films.

36. A semiconductor device comprising:

a substrate having a surface, wherein the substrate is a first or second conduction type;

a drift layer, which is located on the substrate, and which is a first conduction type;

a base region, which is located on the drift layer or embedded in a surface of the drift layer, and which is a second conduction type;

a source region, which is embedded in a surface of the base layer, and which includes;

a first region, which has a predetermined impurity concentration and a predetermined depth; and

a second region, which has an impurity concentration lower than the first region and a depth larger than the first region, wherein;

a trench extends perpendicularly from the surface of the substrate through the base region and reaches the drift region; and

the second region separates the first region from the trench,

a gate-insulating film formed on a sidewall of a trench surface; and

a gate electrode, which is located on the gate-insulating film.

37. A method for manufacturing a semiconductor device, in which a gate-insulating film is located on a sidewall of a trench surface, which defines a trench formed in a surface of a semiconductor substrate, and in which a gate electrode is located on the gate-insulating film, the method comprising steps of:

forming a heavily doped region in the sidewall at a longitudinal end of the trench by doping an impurity with a concentration, at which oxidization speed of the doped region is increased;

oxidizing the trench surface to form a first silicon oxide film, which is thicker at the heavily doped region than the rest of the first silicon oxide film;

forming a silicon nitride film on the first silicon oxide film;

oxidizing the trench surface to form a second silicon oxide film on the silicon nitride film.

38. A method for manufacturing a semiconductor device, in which a gate-insulating film is located on a sidewall of a trench surface, which defines a trench formed in a surface of a semiconductor substrate, and in which a gate electrode is located on the gate-insulating film, the method comprising steps of:

forming a first silicon oxide film on the trench surface;

forming a silicon nitride film on the first silicon oxide film;

removing the silicon nitride film at a longitudinal end of the trench;

oxidizing the sidewall to form a second silicon oxide film on the silicon nitride film and to thicken the first silicon oxide film at the longitudinal end.

41. A method for manufacturing a semiconductor device, the method comprising steps of:

providing a substrate, which is a first or second conduction type;

forming a drift layer, which is a first conduction type, on the substrate;

forming a base region, which is a second conduction type, on the drift layer or in a surface of the drift layer;

forming a source region in a surface of the base region by making a first region, which has a predetermined impurity concentration and a predetermined depth, and a second region, which has an impurity concentration lower than the first region and a depth larger than the first region;

forming a trench, which extends through the source region and the base region and reaches the drift layer, such that the second region separates the first region from the trench;

forming a gate-insulating film on a trench surface; and

forming a gate electrode on the gate-insulating film.

42. A semiconductor device comprising:

a semiconductor substrate having a surface in which a trench is formed, wherein the trench has a wall;

a heavily doped region, which is formed in the wall at an end of the trench, wherein the heavily doped region is doped with an impurity to increase the oxidization speed of the heavily doped region;

a stack of films formed on the wall, wherein the stack includes;

a first silicon oxide film, wherein the thickness of the first silicon oxide film is greater at the end of the trench than elsewhere;

a silicon nitride film; and

a second silicon oxide film, and

a gate electrode formed on the films.

43. The semiconductor device of claim 42, wherein the device includes at least one of an entrance silicon oxide film, the thickness of which is thicker than that of the stack, located at an entrance of the trench, and a bottom film, the thickness of which is greater than that of the stack, located at a bottom of the trench.

44. The semiconductor device of claim 43, wherein the substrate includes:

a source region of a first conduction type;

a base region of a second conduction type; and

a drift region of first conduction type, wherein the source region, the base region, and the drift region are located in this order from the surface and the trench extends perpendicularly from the surface to the drift region through the source region and the base region; and

a channel region in the base region adjacent to the trench.

45. The semiconductor device of claim 44, wherein the source region includes:

a first region, which has a predetermined impurity concentration and a predetermined depth; and

a second region, which has an impurity concentration that is lower than the first region, wherein the depth of the second region is greater than that of the first region, and the second region is located between the first region and the trench.

47. The semiconductor device of claim 46, wherein the device includes at least one of an entrance silicon oxide film, the thickness of which is thicker than that of the stack, located at an entrance of the trench, and a bottom entrance film, the thickness of which is greater than that of the stack, located at a bottom of the trench.

48. The semiconductor device of claim 47, wherein the substrate includes:

a source region of a first conduction type;

a base region of a second conduction type; and

a drift region of first conduction type, wherein the source region, the base region, and the drift region are located in this order from the surface and the trench extends perpendicularly from the surface to the drift region through the source region and the base region; and

a channel region in the base region adjacent to the trench.

49. The semiconductor device of claim 48, wherein the source region includes:

a first region, which has a predetermined impurity concentration and a predetermined depth; and

a second region, which has an impurity concentration that is lower than the first region, wherein the depth of the second region is greater than that of the first region, and the second region is located between the first region and the trench.

46. A semiconductor device comprising:

a semiconductor substrate having a surface in which a trench is formed, wherein the trench has a wall and an end;

a stack of insulating films formed on the wall, wherein the stack includes;

a first silicon oxide film;

a silicon nitride film, which is located on the first silicon oxide film; and

a second silicon oxide film, which is located on the silicon nitride film; and

an end insulating film formed at the end of the trench, wherein the end insulating film includes only the first and second silicon oxide films, and the thickness of the end insulating film is greater than that of the stack, and

a gate electrode formed on the stack and on the end insulating film.

50. A semiconductor device comprising:

a substrate of a first or second conduction type, wherein the substrate has a surface;

a drift layer of the first conduction type, wherein the drift layer is located on the surface of the substrate;

a base layer of a second conduction type, wherein the base layer is located on the drift layer or embedded in a surface of the drift layer;

a source region, which is embedded in a surface of the base layer, wherein the source region includes;

a first region, which has a predetermined impurity concentration and a predetermined depth; and

a second region, which has an impurity concentration that is lower than the first region, wherein the depth of the second region is greater than that of the first region;

a trench that extends perpendicularly from the surface of the substrate through the base region and reaches the drift region, wherein the second region is located between the first region and the trench;

a gate-insulating film formed on a wall of the trench; and

a gate electrode located on the gate-insulating film.

51. A method for manufacturing a semiconductor device, in which a gate-insulating film is located on a wall of a trench formed in a semiconductor substrate, wherein a gate electrode is located on the gate-insulating film, the method comprising:

forming a heavily doped region in the wall at an end of the trench by doping an impurity with a concentration such that the oxidization speed of the doped region is increased;

oxidizing the trench surface to form a first silicon oxide film, which is thicker at the heavily doped region than elsewhere;

forming a silicon nitride film on the first silicon oxide film; and

oxidizing the trench surface to form a second silicon oxide film on the silicon nitride film.

52. The method of claim 51 further comprising:

forming a drift region of a first conduction type;

forming a base region of a second conduction type;

forming a source region of the first conduction type by forming a first region, which has a predetermined impurity concentration and a predetermined depth, and a second region, which has a lower impurity concentration and a greater depth than the first region; and

forming the trench to extend perpendicularly from the surface of the substrate to the drift region through the source region and the base region, such that the second region is located between the first region and the trench.

53. The method of claim 51 further comprising removing the silicon nitride film from at least one of an entrance and a bottom of the trench to form a silicon oxide film thicker than the stack.

54. A method for manufacturing a semiconductor device, in which a gate-insulating film is located on a wall of a trench formed in a semiconductor substrate, wherein a gate electrode is located on the gate-insulating film, the method comprising:

forming a first silicon oxide film on the wall;

forming a silicon nitride film on the first silicon oxide film;

removing the silicon nitride film at an end of the trench;

oxidizing the wall to form a second silicon oxide film on the silicon nitride film and to thicken the first silicon oxide film at the end of the trench.

55. The method of claim 54 further comprising:

forming a drift region of a first conduction type;

forming a base region of a second conduction type;

forming a source region of the first conduction type by forming a first region, which has a predetermined impurity concentration and a predetermined depth, and a second region, which has a lower impurity concentration and a greater depth than the first region; and

forming the trench to extend perpendicularly from the surface of the substrate to the drift region through the source region and the base region, such that the second region is located between the first region and the trench.

56. The method of claim 54 further comprising removing the silicon nitride film from at least one of an entrance and a bottom of the trench to form a silicon oxide film thicker than the stack.

57. A method for manufacturing a semiconductor device, the method comprising:

providing a substrate of a first or second conduction type;

forming a drift layer of the first conduction type on the substrate;

forming a base region of the second conduction type on the drift layer;

forming a source region in a surface of the base region by making a first region, which has a predetermined impurity concentration and a predetermined depth, and a second region, which has a lower impurity concentration and a greater depth than the first region;

forming a trench, which extends through the source region and the base region and reaches the drift layer, such that the second region is located between the first region and the trench;

forming a gate-insulating film in the trench; and

forming a gate electrode on the gate-insulating film.