Multilayer wiring board and semiconductor device
First Claim
1. A multilayer wiring board having through holes in a thickness-wise direction, wherein a semiconductor substrate mounted on the multilayer wiring board has through holes in a thickness-wise direction thereof, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.
3 Assignments
0 Petitions
Accused Products
Abstract
A multilayer wiring board having board having through holes in a thickness-wise direction, in which wiring board a semiconductor substrate mounted on the multi-layer wiring board has through holes in a thickness-wise direction, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.
79 Citations
13 Claims
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1. A multilayer wiring board having through holes in a thickness-wise direction,
wherein a semiconductor substrate mounted on the multilayer wiring board has through holes in a thickness-wise direction thereof, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.
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2. A multilayer wiring board having through holes in a thickness-wise direction,
wherein a semiconductor substrate mounted on the multilayer wiring board has through holes in a thickness-wise direction thereof, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate partly overlap areas which the through holes in the multilayer wiring board occupy.
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3. A multilayer wiring board having a through hole or holes in a thickness-wise direction, wherein respective heating areas inside a semiconductor substrate mounted on the multilayer wiring board are included in areas, which the single or plural through holes in the multilayer wiring board occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate.
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4. A multilayer wiring board having through holes in a thickness-wise direction,
wherein a semiconductor substrate mounted on the multilayer wiring board has through holes in a thickness-wise direction thereof, and heat flow one-dimensionally through the through holes in the semiconductor substrate and the through holes in the multilayer wiring board in the thickness-wise direction when heat flows out to a surface of the multilayer wiring board opposite to that surface thereof, on which the semiconductor substrate is mounted, via the through holes in the semiconductor substrate and the through holes in the multilayer wiring board.
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8. A multilayer wiring board having through holes in a thickness-wise direction,
wherein the distribution density of calorific values in a plane orthogonal to the thickness-wise direction of a semiconductor substrate mounted on the multilayer wiring board substantially coincides with the distribution density in a plane orthogonal to the thickness-wise direction of the through holes.
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9. A multilayer wiring board having through holes in a thickness-wise direction,
wherein the distribution density of calorific values in a plane orthogonal to the thickness-wise direction of a semiconductor substrate mounted on the multilayer wiring board substantially coincides with the distribution density of large and small cross-sectional areas in a plane orthogonal to the thickness-wise direction of the through holes.
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10. A wiring board,
wherein a semiconductor substrate having through holes, which are connected to emitter wirings connected to emitters of heterojunction bipolar transistors and extend through the semiconductor substrate in a thickness-wise direction and which have conductive layers on sides thereof or inside thereof, is mounted on the multilayer wiring board, and the through holes in the semiconductor substrate and the through holes extending through the wiring board in a thickness-wise direction are connected to each other, and wherein conductive layers are provided on sides of or inside of the through holes in the semiconductor substrate and the wiring board, and areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.
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11. A multilayer wiring board,
wherein emitter fingers of heterojunction bipolar transistors are arranged on a semiconductor substrate, the semiconductor substrate is mounted on a wiring board, which has through holes in a thicknesswise direction, and the through holes in the wiring board have on sides or inside thereof a material of good thermal conductivity, and wherein areas, which emitter fingers except emitter fingers at both ends of the emitter fingers electrically connected by the same emitter wirings occupy in a plane orthogonal to the thickness-wise direction of the semiconductor substrate and the wiring board, are included in areas, which the through holes in the wiring board occupy, but areas, which the fingers at the both ends occupy, are not included therein.
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12. A semiconductor device including a plurality of finger-like emitter electrodes or source electrodes, and at least one via hole arranged in rows in a first direction on a semiconductor substrate, in which semiconductor device the emitter electrodes or the source electrodes are connected to a conductive layer formed on a back surface opposite to that surface, on which the electrodes are formed, through the via hole, and in which semiconductor device rows comprising the emitter electrodes or source electrodes, and the via hole are arranged in parallel in a second direction orthogonal to the first direction, and the via holes are positionally offset from one another among adjacent rows, or adjacent rows are positionally offset from one another.
Specification