Apparatus for biasing ultra-low voltage logic circuits
First Claim
1. An integrated circuit device comprising:
- a plurality of transistors; and
a global body bias circuit having an output connected to the bodies of said plurality of transistors, wherein said global body bias circuit includes a first and second transistors connected in series between a first power supply and a second power supply, wherein a gate and a source of said first transistor are connected to said first power supply, wherein a gate and a source of said second transistor are connected to said second power supply, wherein drains and bodies of said first and second transistors are connected together to form said output.
1 Assignment
0 Petitions
Accused Products
Abstract
An apparatus for biasing ultra-low voltage logic circuits is disclosed. An integrated circuit device includes multiple transistors and a global body bias circuit. The global body bias circuit includes a first transistor and second transistors connected in series between a power supply and a second power supply or ground. The gate and source of the first transistor are connected to the first power supply. The gate and source of the second transistor are connected to the second power supply. The drains and bodies of the first and second transistors are connected together to form an output connected to the bodies of the other transistors within the integrated circuit device.
-
Citations
20 Claims
-
1. An integrated circuit device comprising:
-
a plurality of transistors; and
a global body bias circuit having an output connected to the bodies of said plurality of transistors, wherein said global body bias circuit includes a first and second transistors connected in series between a first power supply and a second power supply, wherein a gate and a source of said first transistor are connected to said first power supply, wherein a gate and a source of said second transistor are connected to said second power supply, wherein drains and bodies of said first and second transistors are connected together to form said output. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. An integrated circuit device comprising:
-
a plurality of transistors; and
a global body bias circuit having an output connected to the bodies of said plurality of transistors, wherein said global body bias circuit includes a first and second transistors connected in series between a first power supply and a second power supply, wherein a source of said first transistor and a gate of said second transistor are connected to said first power supply, wherein a source of said second transistor and a gate of said first transistor are connected to said second power supply, wherein drains and bodies of said first and second transistors are connected together to form said output. - View Dependent Claims (8, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, 20)
-
-
13. An integrated circuit device comprising:
-
a plurality of transistors; and
a global body bias circuit having a first output and a second output, wherein said global body bias circuit includes a first transistor and second transistors connected in series between a first power supply and a second power supply, wherein a gate and a source of said first transistor are connected to said first power supply, wherein a gate and a source of said second transistor are connected to said second power supply, wherein drains and bodies of said first and second transistors are connected together to bias bodies of a third transistor and a fourth transistor of said global body bias circuit, wherein gates of said third and said fourth transistors are connected to said first power supply and said second power supply, respectively.
-
Specification