System and method of determining the noise sensitivity of an integrated circuit

• US 20020174408A1
• Filed: 03/19/2001
• Published: 11/21/2002
• Est. Priority Date: 03/19/2001
• Status: Active Grant

• Current Assignee: Valtrus Innovations Limited (f/k/a Dolya Holdco 9 Limited) (Key Patent Innovations Limited)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Wanek, John D., Naffziger, Samuel D.
• Granted Patent: US 6,539,527 B2
• Time in Patent Office: Days
• US Class Current: 716/5
• CPC Class Codes: G01R 31/002 where the device under test is an electronic circuit
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

The present invention includes an apparatus and a method of designing integrated circuits in which the susceptibility of the integrated circuit to noise is estimated by analyzing the components of the circuits. Suspected noise susceptibility factors were investigated to determine the effects of various potential factors on noise characteristics. It was determined that percent of “bad” capacitance to total capacitance of wire coupling pairs of components, the total length of the corresponding wires between pairs of components that are subject to capacitive coupling and driver output impedance of driving circuits each contributed significantly to noise factors in integrated circuits. It was also determined that the integrated circuit being analyzed can be analyzed as pairs of coupled components (drivers, receivers an interconnections between drivers and receivers) to which the noise susceptibility factors can be applied and used to determine the overall susceptibility of noise of the circuit.

Claims

1. A method of designing an integrated circuit comprising the steps of:

specifying a layout of components included in the integrated circuit;

identifying coupled pairs of said components;

identifying noise susceptibility factors for each of said pair of coupled components; and

retrieving prestored noise characteristics using said noise susceptibility factors.

2. The method of claim 1 wherein said step of identifying pairs of said components further comprises the steps of:

identifying a driver, a receiver, and an interconnection therebetween.

3. The method of claim 1 wherein said step of identifying noise susceptibility factors comprises the steps of:

determining a percent of “

bad”

capacitance to total capacitance of wire coupling said pairs of components; and

determining said noise characteristics using said percent of capacitance.

4. The method of claim 1 wherein said step of identifying noise susceptibility factors comprises the steps of:

calculating a total length of each corresponding wires coupling said pairs of components that are subject to capacitive coupling; and

determining respective noise characteristics using each of said total lengths.

5. The method of claim 1 wherein said step of identifying noise susceptibility factors comprises the steps of:

calculating a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupled components; and

determining said noise characteristics using respective one of said driver output impedances.

6. The method of claim 1 wherein said step of identifying noise susceptibility factors comprises the steps of:

determining a percentage of bad capacitance to total capacitance of a wire connecting said pairs of components;

calculating a total length of each of corresponding wires coupling said pairs of components;

calculating a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupled components; and

determining respective noise characteristic using said percentage of a bad capacitance to total capacitance, said total length of wire and said driver output impedance.

7. The method of claim 1 further comprising the step of:

generating said prestored noise characteristics as a function of said noise susceptibility factors.

8. A tool for the design of an integrated circuit comprising:

an integrated circuit layout tool providing an integrated circuit layout including a plurality of pairs of coupled components, each pair coupled by a respective wire;

a noise calculation tool providing noise susceptibility factors for each of said coupled components in said circuit layout; and

a noise calculation tool providing parameter noise characteristics of each of said wires using a prestored value retrieved as a function of said noise susceptibility factors.

9. The tool of claim 8 for the design of an integrated circuit wherein:

said integrated circuit layout provided comprises semiconductor devices.

10. The tool of claim 8 for the design of an integrated circuit wherein:

said noise calculation tool comprises the percent of a bad capacitance to total capacitance of a wire coupling said pairs of components.

11. The tool of claim 8 for the design of an integrated circuit wherein:

said noise calculation tool comprises an total length of each of corresponding wires coupling said pairs of components that are subject to parasitic capacitance.

12. The tool of claim 8 for the design of an integrated circuit wherein:

said noise calculation tool comprises a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupled components.

13. The tool of claim 8 for the design of an integrated circuit wherein:

said noise calculation tool comprises the percent of capacitance of wire coupling said pair of components;

said noise calculation tool comprises an total length of each of corresponding wires coupling said pairs of components that are subject to parasitic capacitance; and

said noise calculation tool comprises a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupled components.

15. The integrated circuit of claim 14 wherein pairs of said coupled components further comprises:

a driver;

a receiver; and

an interconnection therebetween.

16. The integrated circuit of claim 14 wherein said noise susceptibility factor further comprises:

the percent of bad capacitance to total capacitance of a wire coupling said pairs of components.

17. The integrated circuit of claim 14 wherein said noise susceptibility factors further comprises:

an total length of each of corresponding wires coupling said pairs of components that are subject to bad capacitance coupling.

18. The integrated circuit of claim 14 wherein said noise susceptibility factor further comprises:

a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupling components.

19. The integrated circuit of claim 14 wherein said noise susceptibility factor further comprises:

the percent of bad capacitance to total capacitance of a wire coupling said pairs of components; and

an total length of each of corresponding wires coupling said pairs of components that are subject to bad capacitance coupling.

20. The integrated circuit of claim 14 wherein said noise susceptibility factor further comprises:

the percent of bad capacitance to total capacitance of a wire coupling said pairs of components;

an total length of each of corresponding wires coupling said pairs of components that are subject to bad capacitance coupling; and

a driver output impedance of driving circuits each comprising one of said components of each of said pair of coupling components.

14. An integrated circuit formed by the steps of:

specifying a layout of components included in the integrated circuit;

identifying coupled pairs of said components;

identifying noise susceptibility factors for each of said pair of coupled components; and

retrieving prestored noise characteristics using said noise susceptibility factors.