Measurement of critical dimensions of etched features

• US 20020177057A1
• Filed: 06/07/2002
• Published: 11/28/2002
• Est. Priority Date: 05/22/2001
• Status: Active Grant

• Current Assignee: Nikon Precision Incorporated (Nikon Corporation)
• Original Assignee: Nikon Precision Incorporated (Nikon Corporation)
• Inventors: Grodnensky, Ilya
• Granted Patent: US 6,956,659 B2
• Time in Patent Office: Days
• US Class Current: 430/30
• CPC Class Codes: G01B 11/02 for measuring length, width or thickness G01B11/08 takes precedence
• CPC Class Codes: G03F 7/70625 Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness

Abstract

A test mark, as well as methods for forming and using the test mark to facilitate the measurement of the critical dimensions of etched features in semiconductor and other wafer level processing is described. The test marks may be used to characterize, calibrate and/or monitor etch performance. Test marks are defined by imaging (typically at partial exposures) overlapping, angularly offset lines in a resist that covers a layer to be etched. The lines preferably have line widths that are equal (or related) to a critical dimension of interest. After the resist is developed and otherwise processed, the layer is etched as appropriate, thereby creating the test marks. The test marks are then imaged to facilitate the determination of a geometric parameter of each mark. Most commonly, the geometric parameter determined relates to the area of the mark and/or the length of its major dimension. These parameters can then be used to approximate a critical dimension of interest based at least in part on the determined geometric parameter of the test mark.

Claims

1. A method of determining a critical dimension associated with an etch process comprising:

forming a test mark in a device, wherein the test mark is formed at least in part by imaging overlapping, angularly offset lines in a resist that covers a selected layer to define the test mark and thereafter etching at least the selected layer to form the test mark;

detecting at least a portion of the test mark to determine a geometric parameter of the test mark; and

approximating a critical dimension of interest based at least in part on the determined geometric parameter of the test mark.

2. A method as recited in claim 1 wherein the detecting includes imaging the test mark to obtain information indicative of the area of the test mark.

3. A method as recited in claim 1 wherein the detecting includes measuring the test mark to obtain information indicative of the length of the test mark.

4. A method as recited in claim 1 wherein the overlapping lines are a pair of straight lines that are formed at an angle relative to one another.

5. A method as recited in claim 4 wherein the angle is less than approximately 10.0 degrees.

6. A method as recited in claim 4 wherein the angles is at least approximately 0.2 degrees.

7. A method as recited in claim 1 wherein the selected layer that the test mark is formed in is selected from the group consisting of a bulk layer, a semiconductor layer, an insulator layer, and a conductive layer.

8. A method as recited in claim 1 wherein the selected layer that the test mark is formed in is selected from the group consisting of a silicon layer, an interconnect layer, a polysilicon layer, an autoreflective layer, a silicon nitride layer, a silicon oxide layer, and a silicon dioxide layer.

9. A method as recited in claim 1 wherein approximating the critical dimension of interest includes determining a width of at least one of the lines used to create the test mark.

10. A method as recited in claim 1 wherein:

approximating the critical dimension of interest includes determining a width of at least one of the lines used to create the test mark;

the overlapping lines are a pair of straight lines that are formed at an angle (2α

) relative to one another;

the test mark is imaged to obtain information indicative of the length (L) of the test mark; and

the determined line width (CD) is calculated using the formula

CD=[L*sin(α

)]/K

or a formula that is substantially the mathematical equivalent thereof, wherein K is an empirically determined adjustment factor and α

is an angle between the intersecting lines.

11. A method as recited in claim 1 wherein:

approximating the critical dimension of interest includes determining a width of at least one of the lines used to create the test mark;

the overlapping lines are a pair of straight lines that are formed at an angle (2α

) relative to one another;

the test mark is imaged to obtain information indicative of the area (A) of the test mark; and

the determined line width (CD) is calculated using the formula

A=[K*CD²]/sin(2α

)]

or a formula that is substantially the mathematical equivalent thereof, wherein K is an empirically determined adjustment factor.

12. A method as recited in claim 1 wherein the selected layer that the test mark is formed in is an interconnect layer formed from a material selected from the group consisting of aluminum, copper, tungsten, and a titanium-tungsten alloy.

13. A method as recited in claim 1 wherein the device is a wafer having a multiplicity of integrated circuits formed thereon.

14. A method as recited in claim 1 wherein the approximation of the critical dimension of interest includes a geometric calculation based on the determined geometric parameter factored by an empirically determined normalization factor.

15. A method as recited in claim 14 wherein the empirically determined normalization factor is a constant.

16. A method as recited in claim 1 wherein the imaging is performed by a sensor system incorporated into an etch machine.

17. A method as recited in claim 1 wherein the imaging is performed by a measurement device that is separate from an etch machine used to etch the selected layer.

19. A method as recited in claim 1 wherein the approximation of the critical dimension of interest includes a geometric calculation based on the determined geometric parameter factored by an empirically determined normalization factor.

20. A wafer having a multiplicity of test marks formed as recited in claim 1.

21. An integrated circuit having at least one test mark formed as recited in claim 1.

18. A method of characterizing a semiconductor wafer etch process, the method comprising:

forming a test mark in a semiconductor wafer, wherein the test mark is formed at least in part by imaging overlapping, angularly offset straight lines in a resist that covers a selected layer to define the test mark and thereafter etching at least the selected layer to form the test mark, wherein the angular offset is in the range of approximately 0.2 to 10 degrees;

detecting at least a portion of the test mark to determine a geometric parameter of the test mark indicative of at least one of the length of the test mark or an area of at least a portion of the test mark; and

approximating a critical dimension of interest based at least in part on the determined geometric parameter of the test mark.

22. A method of forming and utilizing a test mark that is indicative of a critical dimension of an etched feature, the method comprising:

making a first partial lithographic exposure to define a first line in a resist positioned over a layer of interest, wherein the partial exposure is at a reduced power level relative to a power level used to define other features in the resist;

making a second partial lithographic exposure to define a second line in the resist, wherein the second line overlaps, but is angularly offset from the first line;

developing and stripping the resist to define a resist test feature;

etching the layer of interest, whereby the etching forms a test marks defined by the resist test feature; and

imaging at least a portion of the test mark to facilitate the determination of a geometric parameter of the test mark.

23. A method as recited in claim 22 further comprising approximating a critical dimension of interest based at least in part on the determined geometric parameter of the test mark.

24. A method as recited in claim 23 wherein the approximation of the critical dimension of interest includes a geometric calculation based on the determined geometric parameter factored by an empirically determined normalization factor.

25. A method as recited in claim 24 wherein the empirically determined normalization factor is a constant.

27. An etching machine as recited in claim 26 wherein the detector is an imager suitable for imaging the test marks to determine a parameter indicative of the area of the test marks.

28. An etching machine as recited in claim 26 wherein the detector is a CCD camera.

29. An etching machine as recited in claim 26 wherein the detector is configured to gather data indicative of the length of the test marks.

26. An etching machine comprising:

an etch chamber suitable for etching wafers;

a detector configured for detecting a geometric characteristic of etched test marks defined on wafers that are created during an etch process in the etch chamber.

30. A wafer comprising a multiplicity of test marks formed in a selected etched layer, wherein the test marks are somewhat diamond shaped marks formed at least in part by imaging overlapping, angularly offset straight lines in a sacrificed resist that covered the selected layer to define the test marks and thereafter etching at least the selected layer to form the test marks, wherein the angular offset is in the range of approximately 0.2 to 10 degrees.