Implantable cardiac stimulation device having a programmable reconfigurable sequencer

• US 20020177878A1
• Filed: 03/13/2001
• Published: 11/28/2002
• Est. Priority Date: 03/13/2001
• Status: Active Grant

• Current Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Inventors: Poore, John W., Shankar, Balakrishnan, McNeil, Kenneth R. II
• Granted Patent: US 6,625,488 B2
• Time in Patent Office: Days
• US Class Current: 607/9
• CPC Class Codes: A61N 1/025 Digital circuitry features of electrotherapy devices, e.g. memory, clocks, processors
• CPC Class Codes: A61N 1/372 Arrangements in connection with the implantation of stimulators
• CPC Class Codes: A61N 1/37229 Shape or location of the implanted or external antenna

Abstract

A pacemaker or implantable cardioverter defibrillator is provided with a microcontroller having a general purpose microprocessor for performing high-level device functions and a sequencer for performing routine pacing functions. The general purpose microprocessor is programmed using an instruction set capable of general programming applications. The sequencer is programmed using a very simple instruction set having instructions selected only for performing routine pacing functions. The sequencer may be, for example, a programmable state machine. By providing a programmable sequencer for controlling routine pacing operations, the microprocessor is thereby free to devote its resources to performing high-level functions. Hence, the microprocessor may be operated at a lower clock frequency than would otherwise be needed if the microprocessor were also required to perform routine pacing functions and power savings are thereby achieved. By controlling all routine pacing operations using the programmable sequencer, the routine operations are thereby more expediently and reliably performed. Also, because software for the sequencer is developed using only the simple instruction set associated therewith, pacing software is quickly and reliably developed. Additional benefits are gained by isolating the pacing software from the high-level functional software to permit, for example, the microprocessor software to be replaced without affecting the sequencer software, and vice versa. Also, a method is described for generating an integrated circuit having a configuration optimized based upon predetermined software requirements. The method may be used to design the sequencer.

Claims

1. An implantable cardiac stimulation device for delivering therapy to heart tissue comprising:

a sensing circuit for sensing a cardiac signal from the heart tissue;

an electrical therapy delivery circuit for delivering therapy to the heart tissue; and

a controller having

a programmable sequencer for analyzing the cardiac signal to determine whether therapy is needed and for controlling the electrical therapy delivery circuit to deliver therapy, and

a general purpose programmable microprocessor for performing non-therapy-delivering operations.

2. The stimulation device of claim 1 wherein the electrical therapy delivery circuit includes pacing pulse generators and wherein the programmable sequencer controls delivery of pacing pulses to the heart tissue by the pulse generators.

3. The stimulation device of claim 1 wherein the electrical therapy delivery circuit includes a shocking circuit and wherein the programmable sequencer controls delivery of defibrillation shocks to the heart tissue by the shocking circuit.

4. The stimulation device of claim 1 wherein the implantable cardiac stimulation device includes a battery, a set of leads, and a memory for storing data and wherein the non-therapy-delivery operations of the programmable microprocessor controls include battery monitoring operations, lead monitoring operations, and data storage operations.

5. The stimulation device of claim 1 wherein the microprocessor is a complex instruction set computing (CISC) processor or a reduced instruction set computing (RISC) processor.

6. The stimulation device of claim 1 wherein the sequencer is an event-driven programmable state machine.

7. The stimulation device of claim 6 wherein the controller includes a watch dog circuit for resetting the sequencer if a pre-determined watchdog time-out period has elapsed.

8. The stimulation device of claim 6 wherein the controller includes

an input circuit for providing input signals to the sequencer;

an output circuit for receiving output signals from the sequencer;

a timer circuit for timing operations and for forwarding time-out signals to the sequencer; and

a marker circuit for receiving event markers from the sequencer.

9. The stimulation device of claim 8 wherein input circuit includes

a rising latch for latching the rising edge of input signals;

a failing latch for latching the falling edge of input signals;

a mask circuit for masking selected signals from the rising and falling latches and for forwarding un-masked signals from the rising and falling latches to the sequencer.

10. The stimulation device of claim 9 wherein the controller also includes a watch dog circuit for resetting the sequencer if a pre-determined watchdog time-out period has elapsed.

11. The stimulation device of claim 8 wherein output circuit includes

an output latch for latching output signals from the sequencer;

and

a pulse generator for generating pacing pulses based upon signals latched in the output latched subject to a pulse output signal provided by the sequencer.

12. The stimulation device of claim 8 wherein timer circuit includes

a timer receiving timing values from the sequencer;

a clock select circuit for selecting a clock signal for use by the timer;

a preload circuit for preloading the timer with values received by the microprocessor; and

a mask circuit for masking selected signals output from the timer and for forwarding un-masked signals from the timer to the sequencer.

13. The stimulation device of claim 8 wherein watchdog circuit includes

a watchdog timer for periodically receiving a reset signal from the sequencer;

a preload circuit for preloading the watchdog timer with a pre-determined value; and

a program counter for receiving a reset signal from the watchdog timer whenever the watchdog timer times out before a reset signal is received from the sequencer, with the program counter forwarding a default program counter value to the sequencer in response thereto for re-starting the sequencer.

14. The stimulation device of claim 6 wherein the controller includes

a set of timers for timing the durations of states on behalf of the sequencer, the timers providing signals to the sequencer upon completion of each state;

a set of event latches for storing control signals to change the sequence of states of the sequencer;

a set of flag registers for storing sequencing information on behalf of the sequencer and the microprocessor, the sequencer modifying its sequence of operations based upon the flag bits;

a set of control registers for storing commands generated by the sequencer, the sequencer controlling pacing operations of the device by storing selected commands in the control registers; and

a set of event buffers for storing the date and time of selected events processed by the sequencer.

15. The stimulation device of claim 14 wherein the set of timers include:

a set of multi-load timers for timing the duration of states shorter than the duration of a cardiac cycle; and

a set of single load timers for timing the duration of states greater than or equal to the duration of a cardiac cycle.

16. The stimulation device of claim 14 wherein the set of event latches store control signals associated with detection of intrinsic events including R-waves and P-waves.

17. The stimulation device of claim 14 wherein the set of event latches store control signals associated with refractory periods.

18. The stimulation device of claim 14 wherein the microprocessor controls the sequencer by storing selected flag bits in the flag registers for subsequent access by the sequencer.

19. The stimulation device of claim 1 wherein the programmable sequencer operates using a first instruction set and the programmable microprocessor operates using a second instruction set, more complex than the first.

20. The stimulation device of claim 19 wherein the first instruction set comprises non-arithmetic instructions only.

21. The stimulation device of claim 1 wherein the sequencer is a RAM-based state machine.

22. The stimulation device of claim 21 wherein the RAM-based state machine includes:

a state register for storing the identity of a current state;

a state cross-point switch and control logic circuit for selecting system parameters for use in determining the identity of a next state; and

a state logic RAM for determining the identity of a next state based upon the system parameters.

23. The stimulation device of claim 22 further including a set of timers for timing the durations of states on behalf of the state machine, the timers providing signals to the state machine upon completion of each state.

24. The stimulation device of claim 22 wherein the microprocessor re-programs the state logic RAM to change the programming of the state machine.

25. The stimulation device of claim 24 wherein the microprocessor receives re-programming commands transmitted from an external programmer.

26. The stimulation device of claim 22 further including a set of event detectors for detecting events.

27. The stimulation device of claim 26 wherein the event detectors include a P-wave detector and an R-wave detector.

28. The stimulation device of claim 22 further including a set of event generators for generating pacing events.

29. The stimulation device of claim 28 wherein the event detectors include an A-pulse generator and a V-pulse generator.

30. An implantable cardiac stimulation device for delivering therapy under the control of a controller which controls both therapy-delivery operations and non-therapy-delivery operations of the device, the controller comprising:

means for controlling the therapy-delivery operations of the device based upon a first instruction set having a limited set of instructions; and

means for controlling the non-therapy-delivery operations of the device based upon a second instruction set having a full set of instructions adapted to controlling any function of the implantable cardiac stimulation device.

31. In an implantable cardiac stimulation device having a sensing circuit for sensing a cardiac signal, an electrical therapy delivery circuit for delivering therapy to heart tissue, a programmable sequencer, and a general purpose programmable microprocessor, a method comprising the steps of:

sensing a cardiac signal using the sensing circuit;

analyzing the cardiac signal using the programmable sequencer to determine whether therapy is needed and controlling the electrical therapy delivery circuit to deliver therapy using the programmable sequencer; and

performing non-therapy-delivery operations using the general purpose programmable microprocessor.